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Searched refs:usubw2 (Results 1 – 25 of 33) sorted by relevance

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/external/llvm/test/MC/AArch64/
Dneon-3vdiff.s357 usubw2 v0.8h, v1.8h, v2.16b
358 usubw2 v0.4s, v1.4s, v2.8h
359 usubw2 v0.2d, v1.2d, v2.4s
Dneon-diagnostics.s2745 usubw2 v0.8h, v1.8h, v2.16h
2746 usubw2 v0.4s, v1.4s, v2.8s
2747 usubw2 v0.2d, v1.2d, v2.4d
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AArch64/
Dneon-3vdiff.s357 usubw2 v0.8h, v1.8h, v2.16b
358 usubw2 v0.4s, v1.4s, v2.8h
359 usubw2 v0.2d, v1.2d, v2.4s
Dneon-diagnostics.s2691 usubw2 v0.8h, v1.8h, v2.16h
2692 usubw2 v0.4s, v1.4s, v2.8s
2693 usubw2 v0.2d, v1.2d, v2.4d
/external/capstone/suite/MC/AArch64/
Dneon-3vdiff.s.cs123 0x20,0x30,0x22,0x6e = usubw2 v0.8h, v1.8h, v2.16b
124 0x20,0x30,0x62,0x6e = usubw2 v0.4s, v1.4s, v2.8h
125 0x20,0x30,0xa2,0x6e = usubw2 v0.2d, v1.2d, v2.4s
/external/llvm/test/CodeGen/AArch64/
Darm64-vsub.ll382 ;CHECK: usubw2.8h
395 ;CHECK: usubw2.4s
408 ;CHECK: usubw2.2d
Darm64-neon-3vdiff.ll517 ; CHECK: usubw2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.16b
527 ; CHECK: usubw2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.8h
537 ; CHECK: usubw2 {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.4s
/external/swiftshader/third_party/llvm-7.0/llvm/test/Analysis/CostModel/AArch64/
Dfree-widening-casts.ll463 ; CODE: usubw2 v2.8h, v2.8h, v0.16b
474 ; CODE: usubw2 v2.4s, v2.4s, v0.8h
485 ; CODE: usubw2 v2.2d, v2.2d, v0.4s
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/AArch64/
Dneon-instructions.txt1419 # CHECK: usubw2 v0.8h, v1.8h, v2.16b
1420 # CHECK: usubw2 v0.4s, v1.4s, v2.8h
1421 # CHECK: usubw2 v0.2d, v1.2d, v2.4s
/external/llvm/test/MC/Disassembler/AArch64/
Dneon-instructions.txt1419 # CHECK: usubw2 v0.8h, v1.8h, v2.16b
1420 # CHECK: usubw2 v0.4s, v1.4s, v2.8h
1421 # CHECK: usubw2 v0.2d, v1.2d, v2.4s
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AArch64/
Darm64-neon-3vdiff.ll517 ; CHECK: usubw2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.16b
527 ; CHECK: usubw2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.8h
537 ; CHECK: usubw2 {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.4s
/external/v8/src/arm64/
Dmacro-assembler-arm64.h504 V(usubw2, Usubw2) \
Dsimulator-arm64.h1684 LogicVRegister usubw2(VectorFormat vform, LogicVRegister dst,
Dassembler-arm64.h2100 void usubw2(const VRegister& vd, const VRegister& vn, const VRegister& vm);
/external/vixl/test/test-trace-reference/
Dlog-disasm-colour2124 0x~~~~~~~~~~~~~~~~ 6ea633b2 usubw2 v18.2d, v29.2d, v6.4s
2125 0x~~~~~~~~~~~~~~~~ 6e7430c6 usubw2 v6.4s, v6.4s, v20.8h
2126 0x~~~~~~~~~~~~~~~~ 6e303092 usubw2 v18.8h, v4.8h, v16.16b
Dlog-disasm2124 0x~~~~~~~~~~~~~~~~ 6ea633b2 usubw2 v18.2d, v29.2d, v6.4s
2125 0x~~~~~~~~~~~~~~~~ 6e7430c6 usubw2 v6.4s, v6.4s, v20.8h
2126 0x~~~~~~~~~~~~~~~~ 6e303092 usubw2 v18.8h, v4.8h, v16.16b
Dlog-cpufeatures-custom2123 0x~~~~~~~~~~~~~~~~ 6ea633b2 usubw2 v18.2d, v29.2d, v6.4s ### {NEON} ###
2124 0x~~~~~~~~~~~~~~~~ 6e7430c6 usubw2 v6.4s, v6.4s, v20.8h ### {NEON} ###
2125 0x~~~~~~~~~~~~~~~~ 6e303092 usubw2 v18.8h, v4.8h, v16.16b ### {NEON} ###
Dlog-cpufeatures2123 0x~~~~~~~~~~~~~~~~ 6ea633b2 usubw2 v18.2d, v29.2d, v6.4s // Needs: NEON
2124 0x~~~~~~~~~~~~~~~~ 6e7430c6 usubw2 v6.4s, v6.4s, v20.8h // Needs: NEON
2125 0x~~~~~~~~~~~~~~~~ 6e303092 usubw2 v18.8h, v4.8h, v16.16b // Needs: NEON
Dlog-cpufeatures-colour2123 0x~~~~~~~~~~~~~~~~ 6ea633b2 usubw2 v18.2d, v29.2d, v6.4s NEON
2124 0x~~~~~~~~~~~~~~~~ 6e7430c6 usubw2 v6.4s, v6.4s, v20.8h NEON
2125 0x~~~~~~~~~~~~~~~~ 6e303092 usubw2 v18.8h, v4.8h, v16.16b NEON
Dlog-all5551 0x~~~~~~~~~~~~~~~~ 6ea633b2 usubw2 v18.2d, v29.2d, v6.4s
5553 0x~~~~~~~~~~~~~~~~ 6e7430c6 usubw2 v6.4s, v6.4s, v20.8h
5555 0x~~~~~~~~~~~~~~~~ 6e303092 usubw2 v18.8h, v4.8h, v16.16b
/external/vixl/test/aarch64/
Dtest-trace-aarch64.cc2466 __ usubw2(v18.V2D(), v29.V2D(), v6.V4S()); in GenerateTestSequenceNEON() local
2467 __ usubw2(v6.V4S(), v6.V4S(), v20.V8H()); in GenerateTestSequenceNEON() local
2468 __ usubw2(v18.V8H(), v4.V8H(), v16.V16B()); in GenerateTestSequenceNEON() local
Dtest-cpu-features-aarch64.cc2715 TEST_NEON(usubw2_0, usubw2(v0.V8H(), v1.V8H(), v2.V16B()))
2716 TEST_NEON(usubw2_1, usubw2(v0.V4S(), v1.V4S(), v2.V8H()))
2717 TEST_NEON(usubw2_2, usubw2(v0.V2D(), v1.V2D(), v2.V4S()))
/external/vixl/src/aarch64/
Dsimulator-aarch64.h2442 LogicVRegister usubw2(VectorFormat vform,
Dassembler-aarch64.h3081 void usubw2(const VRegister& vd, const VRegister& vn, const VRegister& vm);
Dmacro-assembler-aarch64.h2658 V(usubw2, Usubw2) \

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