| /external/mesa3d/src/amd/vulkan/ |
| D | radv_util.h | 5 #define util_bitcount(i) __builtin_popcount(i) macro
8 util_bitcount(unsigned int n);
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| D | radv_query.c | 708 pipeline_stats_mask |= util_bitcount(pipeline_stats_mask) << 16; in radv_query_shader()
909 dest += util_bitcount(pool->pipeline_stats_mask) * 8; in radv_GetQueryPoolResults()
917 dest += util_bitcount(pool->pipeline_stats_mask) * 4; in radv_GetQueryPoolResults()
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| /external/mesa3d/src/gallium/auxiliary/util/ |
| D | u_math.h | 481 util_bitcount(unsigned n) in util_bitcount() function
507 return util_bitcount(n) + util_bitcount(n >> 32); in util_bitcount64()
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| /external/mesa3d/src/amd/common/ |
| D | ac_gpu_info.c | 312 info->num_sdma_rings = util_bitcount(dma.available_rings); in ac_query_gpu_info()
313 info->num_compute_rings = util_bitcount(compute.available_rings); in ac_query_gpu_info()
320 util_bitcount(amdinfo->cu_bitmap[i][j]); in ac_query_gpu_info()
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| D | ac_debug.c | 161 util_bitcount(field->mask)); in ac_dump_reg()
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| /external/mesa3d/src/gallium/drivers/i915/ |
| D | i915_state_emit.c | 128 *batch_space = 1 + util_bitcount(dirty); in validate_immediate()
204 int i, num = util_bitcount(dirty); in emit_immediate()
233 *batch_space = util_bitcount(i915->dynamic_dirty & ((1 << I915_MAX_DYNAMIC) - 1)); in validate_dynamic()
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| /external/mesa3d/src/gallium/drivers/softpipe/ |
| D | sp_quad_fs.c | 70 util_bitcount(quad->inout.mask); in shade_quad()
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| D | sp_setup.c | 168 setup->numFragsEmitted += util_bitcount(quad->inout.mask); in clip_emit_quad()
243 setup->numFragsEmitted += util_bitcount(quadmask); in flush_spans()
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| /external/mesa3d/src/gallium/drivers/r600/ |
| D | r600_streamout.c | 85 unsigned num_bufs = util_bitcount(rctx->streamout.enabled_mask); in r600_streamout_buffers_dirty()
86 unsigned num_bufs_appended = util_bitcount(rctx->streamout.enabled_mask & in r600_streamout_buffers_dirty()
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| D | eg_debug.c | 120 util_bitcount(field->mask)); in eg_dump_reg()
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| D | r600_state_common.c | 432 util_bitcount(state->dirty_mask & state->has_bordercolor_mask) * 11 + in r600_sampler_states_dirty()
433 util_bitcount(state->dirty_mask & ~state->has_bordercolor_mask) * 5; in r600_sampler_states_dirty()
553 util_bitcount(rctx->vertex_buffer_state.dirty_mask); in r600_vertex_buffers_dirty()
609 util_bitcount(state->dirty_mask); in r600_sampler_views_dirty()
1140 state->atom.num_dw = rctx->b.chip_class >= EVERGREEN ? util_bitcount(state->dirty_mask)*20 in r600_constant_buffers_dirty()
1141 : util_bitcount(state->dirty_mask)*19; in r600_constant_buffers_dirty()
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| D | evergreen_state.c | 1804 int offset = util_bitcount(rctx->fragment_images.enabled_mask); in evergreen_emit_fragment_buffer_state()
1812 int offset = util_bitcount(rctx->compute_images.enabled_mask); in evergreen_emit_compute_buffer_state()
1894 i += util_bitcount(rctx->fragment_images.enabled_mask); in evergreen_emit_framebuffer_state()
1895 i += util_bitcount(rctx->fragment_buffers.enabled_mask); in evergreen_emit_framebuffer_state()
4051 istate->atom.num_dw = util_bitcount(istate->enabled_mask) * 46; in evergreen_set_shader_buffers()
4225 istate->atom.num_dw = util_bitcount(istate->enabled_mask) * 46; in evergreen_set_shader_images()
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| D | evergreen_compute.c | 764 …rctx->cs_vertex_buffer_state.atom.num_dw = 12 * util_bitcount(rctx->cs_vertex_buffer_state.dirty_m… in compute_emit_cs()
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| /external/mesa3d/src/gallium/state_trackers/clover/api/ |
| D | memory.cpp | 43 util_bitcount(d_flags & dev_access_flags) > 1 || in validate_flags()
44 util_bitcount(d_flags & host_access_flags) > 1) in validate_flags()
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| /external/mesa3d/src/gallium/drivers/llvmpipe/ |
| D | lp_rast_tri_tmp.h | 131 LP_COUNT_ADD(nr_empty_4, util_bitcount(0xffff & ~(partial_mask | inmask))); in TAG()
285 LP_COUNT_ADD(nr_empty_16, util_bitcount(0xffff & ~(partial_mask | inmask))); in TAG()
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| D | lp_setup_tri.c | 933 int count = util_bitcount(partial); in lp_setup_bin_triangle()
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| /external/mesa3d/src/gallium/drivers/radeonsi/ |
| D | si_shader_tgsi_setup.c | 341 LLVMConstInt(ctx->i32, util_bitcount(array->writemask), 0), in get_pointer_into_array()
346 util_bitcount(array->writemask & ((1 << swizzle) - 1)), 0), in get_pointer_into_array()
673 array_size = ((last - first) + 1) * util_bitcount(writemask); in emit_declaration()
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| D | si_fence.c | 151 assert(util_bitcount(flags & (PIPE_FLUSH_TOP_OF_PIPE | PIPE_FLUSH_BOTTOM_OF_PIPE)) == 1); in si_fine_fence_set()
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| /external/mesa3d/src/gallium/drivers/nouveau/codegen/ |
| D | nv50_ir_util.cpp | 291 count += util_bitcount(data[i]); in popCount()
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| /external/mesa3d/src/gallium/drivers/nouveau/nv50/ |
| D | nv50_screen.c | 987 screen->TPs = util_bitcount(value & 0xffff); in nv50_screen_create()
988 screen->MPsInTP = util_bitcount((value >> 24) & 0xf); in nv50_screen_create()
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| D | nv50_shader_state.c | 321 unsigned n = util_bitcount(fp->in[i].mask); in nv50_sprite_coords_validate()
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| /external/virglrenderer/src/gallium/auxiliary/util/ |
| D | u_math.h | 725 util_bitcount(unsigned n) in util_bitcount() function
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| /external/mesa3d/src/gallium/drivers/freedreno/a3xx/ |
| D | fd3_program.c | 96 util_bitcount(rast->clip_plane_enable) > 6 || in fd3_needs_manual_clipping()
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| D | fd3_emit.c | 583 MIN2(util_bitcount(planes), 6)); in fd3_emit_state()
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| /external/mesa3d/src/gallium/drivers/r300/ |
| D | r300_emit.c | 1109 unsigned input_count = MAX2(util_bitcount(code->InputsRead), 1); in r300_emit_vs_state()
1110 unsigned output_count = MAX2(util_bitcount(code->OutputsWritten), 1); in r300_emit_vs_state()
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