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Searched refs:uxtw (Results 1 – 25 of 134) sorted by relevance

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/external/llvm/test/MC/AArch64/
Darm64-arithmetic-encoding.s172 add w1, w2, w3, uxtw
181 ; CHECK: add w1, w2, w3, uxtw ; encoding: [0x41,0x40,0x23,0x0b]
190 add x1, x2, w3, uxtw
197 ; CHECK: add x1, x2, w3, uxtw ; encoding: [0x41,0x40,0x23,0x8b]
203 add w1, wsp, w3, uxtw #0
216 sub w1, w2, w3, uxtw
225 ; CHECK: sub w1, w2, w3, uxtw ; encoding: [0x41,0x40,0x23,0x4b]
234 sub x1, x2, w3, uxtw
241 ; CHECK: sub x1, x2, w3, uxtw ; encoding: [0x41,0x40,0x23,0xcb]
247 sub w1, wsp, w3, uxtw #0
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AArch64/
Darm64-arithmetic-encoding.s172 add w1, w2, w3, uxtw
181 ; CHECK: add w1, w2, w3, uxtw ; encoding: [0x41,0x40,0x23,0x0b]
190 add x1, x2, w3, uxtw
197 ; CHECK: add x1, x2, w3, uxtw ; encoding: [0x41,0x40,0x23,0x8b]
203 add w1, wsp, w3, uxtw #0
216 sub w1, w2, w3, uxtw
225 ; CHECK: sub w1, w2, w3, uxtw ; encoding: [0x41,0x40,0x23,0x4b]
234 sub x1, x2, w3, uxtw
241 ; CHECK: sub x1, x2, w3, uxtw ; encoding: [0x41,0x40,0x23,0xcb]
247 sub w1, wsp, w3, uxtw #0
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AArch64/SVE/
Duxtw.s10 uxtw z0.d, p0/m, z0.d label
16 uxtw z31.d, p7/m, z31.d label
32 uxtw z4.d, p7/m, z31.d label
44 uxtw z4.d, p7/m, z31.d label
Dadr.s70 adr z0.d, [z0.d, z0.d, uxtw]
76 adr z0.d, [z0.d, z0.d, uxtw #0]
82 adr z0.d, [z0.d, z0.d, uxtw #1]
88 adr z0.d, [z0.d, z0.d, uxtw #2]
94 adr z0.d, [z0.d, z0.d, uxtw #3]
Dprfw-diagnostics.s46 prfw #0, p0, [x0, x0, uxtw]
75 prfw #0, p0, [x0, z0.s, uxtw #3]
163 prfw #7, p3, [x13, z8.d, uxtw #2]
169 prfw #7, p3, [x13, z8.d, uxtw #2]
Dst1w.s70 st1w { z0.s }, p0, [x0, z0.s, uxtw]
82 st1w { z0.d }, p0, [x0, z0.d, uxtw]
94 st1w { z0.s }, p0, [x0, z0.s, uxtw #2]
106 st1w { z0.d }, p0, [x0, z0.d, uxtw #2]
Dldff1sh.s46 ldff1sh { z0.s }, p0/z, [x0, z0.s, uxtw]
58 ldff1sh { z31.s }, p7/z, [sp, z31.s, uxtw #1]
82 ldff1sh { z21.d }, p5/z, [x10, z21.d, uxtw]
94 ldff1sh { z0.d }, p0/z, [x0, z0.d, uxtw #1]
Dldff1w.s46 ldff1w { z0.s }, p0/z, [x0, z0.s, uxtw]
58 ldff1w { z31.s }, p7/z, [sp, z31.s, uxtw #2]
82 ldff1w { z21.d }, p5/z, [x10, z21.d, uxtw]
94 ldff1w { z0.d }, p0/z, [x0, z0.d, uxtw #2]
Dldff1h.s64 ldff1h { z0.s }, p0/z, [x0, z0.s, uxtw]
76 ldff1h { z31.s }, p7/z, [sp, z31.s, uxtw #1]
100 ldff1h { z21.d }, p5/z, [x10, z21.d, uxtw]
112 ldff1h { z0.d }, p0/z, [x0, z0.d, uxtw #1]
Dst1h.s100 st1h { z0.s }, p0, [x0, z0.s, uxtw]
112 st1h { z0.d }, p0, [x0, z0.d, uxtw]
124 st1h { z0.s }, p0, [x0, z0.s, uxtw #1]
136 st1h { z0.d }, p0, [x0, z0.d, uxtw #1]
Dld1sh.s76 ld1sh { z0.s }, p0/z, [x0, z0.s, uxtw]
88 ld1sh { z31.s }, p7/z, [sp, z31.s, uxtw #1]
112 ld1sh { z21.d }, p5/z, [x10, z21.d, uxtw]
124 ld1sh { z0.d }, p0/z, [x0, z0.d, uxtw #1]
Dld1w.s76 ld1w { z0.s }, p0/z, [x0, z0.s, uxtw]
88 ld1w { z31.s }, p7/z, [sp, z31.s, uxtw #2]
112 ld1w { z21.d }, p5/z, [x10, z21.d, uxtw]
124 ld1w { z0.d }, p0/z, [x0, z0.d, uxtw #2]
Dld1h.s106 ld1h { z0.s }, p0/z, [x0, z0.s, uxtw]
118 ld1h { z31.s }, p7/z, [sp, z31.s, uxtw #1]
142 ld1h { z21.d }, p5/z, [x10, z21.d, uxtw]
154 ld1h { z0.d }, p0/z, [x0, z0.d, uxtw #1]
Dadr-diagnostics.s21 adr z0.s, [z0.s, z0.s, uxtw]
36 adr z0.d, [z0.d, z0.s, uxtw]
51 adr z0.d, [z0.d, z0.d, uxtw #4]
Dprfb.s196 prfb pldl1keep, p0, [x0, z0.s, uxtw]
202 prfb pldl3strm, p5, [x10, z21.s, uxtw]
208 prfb pldl1keep, p0, [x0, z0.d, uxtw]
Dst1d.s40 st1d { z0.d }, p0, [x0, z0.d, uxtw]
52 st1d { z0.d }, p0, [x0, z0.d, uxtw #3]
Dldff1sw.s40 ldff1sw { z21.d }, p5/z, [x10, z21.d, uxtw]
52 ldff1sw { z0.d }, p0/z, [x0, z0.d, uxtw #2]
Dldff1d.s40 ldff1d { z21.d }, p5/z, [x10, z21.d, uxtw]
52 ldff1d { z0.d }, p0/z, [x0, z0.d, uxtw #3]
Dld1sw.s58 ld1sw { z21.d }, p5/z, [x10, z21.d, uxtw]
70 ld1sw { z0.d }, p0/z, [x0, z0.d, uxtw #2]
Dld1d.s58 ld1d { z21.d }, p5/z, [x10, z21.d, uxtw]
70 ld1d { z0.d }, p0/z, [x0, z0.d, uxtw #3]
/external/llvm/test/CodeGen/AArch64/
Darm64-register-offset-addressing.ll34 ; CHECK: ldrb {{w[0-9]+}}, [{{x[0-9]+}}, {{w[0-9]+}}, uxtw]
50 ; CHECK: ldrh {{w[0-9]+}}, [{{x[0-9]+}}, {{w[0-9]+}}, uxtw]
71 ; CHECK: strh {{w[0-9]+}}, [{{x[0-9]+}}, {{w[0-9]+}}, uxtw #1]
85 ; CHECK: ldr {{w[0-9]+}}, [{{x[0-9]+}}, {{w[0-9]+}}, uxtw]
105 ; CHECK: str {{w[0-9]+}}, [{{x[0-9]+}}, {{w[0-9]+}}, uxtw #2]
119 ; CHECK: ldr {{x[0-9]+}}, [{{x[0-9]+}}, {{w[0-9]+}}, uxtw]
138 ; CHECK: str {{x[0-9]+}}, [{{x[0-9]+}}, {{w[0-9]+}}, uxtw #3]
Dldst-regoffset.ll34 ; CHECK: ldrb {{w[0-9]+}}, [{{x[0-9]+}}, {{[xw][0-9]+}}, uxtw]
62 ; CHECK: ldrh {{w[0-9]+}}, [{{x[0-9]+}}, {{[xw][0-9]+}}, uxtw]
90 ; CHECK: strh {{w[0-9]+}}, [{{x[0-9]+}}, {{[xw][0-9]+}}, uxtw #1]
114 ; CHECK: ldr {{w[0-9]+}}, [{{x[0-9]+}}, {{[xw][0-9]+}}, uxtw]
142 ; CHECK: str {{w[0-9]+}}, [{{x[0-9]+}}, {{[xw][0-9]+}}, uxtw #2]
166 ; CHECK: ldr {{x[0-9]+}}, [{{x[0-9]+}}, {{[xw][0-9]+}}, uxtw]
190 ; CHECK: str {{x[0-9]+}}, [{{x[0-9]+}}, {{[xw][0-9]+}}, uxtw #3]
215 ; CHECK: ldr {{s[0-9]+}}, [{{x[0-9]+}}, {{[xw][0-9]+}}, uxtw]
242 ; CHECK: str {{s[0-9]+}}, [{{x[0-9]+}}, {{[xw][0-9]+}}, uxtw #2]
268 ; CHECK: ldr {{d[0-9]+}}, [{{x[0-9]+}}, {{[xw][0-9]+}}, uxtw]
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AArch64/
Darm64-register-offset-addressing.ll33 ; CHECK: ldrb {{w[0-9]+}}, [{{x[0-9]+}}, {{w[0-9]+}}, uxtw]
49 ; CHECK: ldrh {{w[0-9]+}}, [{{x[0-9]+}}, {{w[0-9]+}}, uxtw]
70 ; CHECK: strh {{w[0-9]+}}, [{{x[0-9]+}}, {{w[0-9]+}}, uxtw #1]
84 ; CHECK: ldr {{w[0-9]+}}, [{{x[0-9]+}}, {{w[0-9]+}}, uxtw]
104 ; CHECK: str {{w[0-9]+}}, [{{x[0-9]+}}, {{w[0-9]+}}, uxtw #2]
118 ; CHECK: ldr {{x[0-9]+}}, [{{x[0-9]+}}, {{w[0-9]+}}, uxtw]
137 ; CHECK: str {{x[0-9]+}}, [{{x[0-9]+}}, {{w[0-9]+}}, uxtw #3]
Dldst-regoffset.ll34 ; CHECK: ldrb {{w[0-9]+}}, [{{x[0-9]+}}, {{[xw][0-9]+}}, uxtw]
62 ; CHECK: ldrh {{w[0-9]+}}, [{{x[0-9]+}}, {{[xw][0-9]+}}, uxtw]
90 ; CHECK: strh {{w[0-9]+}}, [{{x[0-9]+}}, {{[xw][0-9]+}}, uxtw #1]
114 ; CHECK: ldr {{w[0-9]+}}, [{{x[0-9]+}}, {{[xw][0-9]+}}, uxtw]
142 ; CHECK: str {{w[0-9]+}}, [{{x[0-9]+}}, {{[xw][0-9]+}}, uxtw #2]
166 ; CHECK: ldr {{x[0-9]+}}, [{{x[0-9]+}}, {{[xw][0-9]+}}, uxtw]
190 ; CHECK: str {{x[0-9]+}}, [{{x[0-9]+}}, {{[xw][0-9]+}}, uxtw #3]
215 ; CHECK: ldr {{s[0-9]+}}, [{{x[0-9]+}}, {{[xw][0-9]+}}, uxtw]
242 ; CHECK: str {{s[0-9]+}}, [{{x[0-9]+}}, {{[xw][0-9]+}}, uxtw #2]
268 ; CHECK: ldr {{d[0-9]+}}, [{{x[0-9]+}}, {{[xw][0-9]+}}, uxtw]
[all …]
Daddsub_ext.ll274 ; N.b. we could probably check more here ("add w2, w3, w1, uxtw" for
287 ; CHECK: add {{x[0-9]+}}, {{x[0-9]+}}, {{w[0-9]+}}, uxtw
293 ; CHECK: add {{x[0-9]+}}, {{x[0-9]+}}, {{w[0-9]+}}, uxtw #2
318 ; CHECK: sub {{x[0-9]+}}, {{x[0-9]+}}, {{w[0-9]+}}, uxtw
324 ; CHECK: sub {{x[0-9]+}}, {{x[0-9]+}}, {{w[0-9]+}}, uxtw #2
339 ; Check that implicit zext from w reg write is used instead of uxtw form of add.
351 ; Check that implicit zext from w reg write is used instead of uxtw
364 ; Check that implicit zext from w reg write is used instead of uxtw form of subs/cmp.
377 ; Check that implicit zext from w reg write is used instead of uxtw
391 ; Check that implicit zext from w reg write is used instead of uxtw
[all …]

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