| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Hexagon/ |
| D | bug14859-split-const-block-addr.ll | 202 %v84 = phi i8* [ %v111, %b31 ], [ %v71, %b22 ]
213 %v89 = phi i8* [ %v71, %b21 ], [ %v111, %b31 ]
231 %v97 = phi i8* [ %v111, %b31 ], [ %v84, %b23 ]
240 %v99 = phi i8* [ %v111, %b31 ], [ %v84, %b24 ]
255 %v111 = getelementptr inbounds i8, i8* %v99, i32 -1
256 store i8 %v110, i8* %v111, align 1, !tbaa !4
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| D | regscavengerbug.ll | 197 %v111 = load double, double* %v110, align 8, !tbaa !6
208 %v122 = fcmp olt double %v121, %v111
209 %v123 = select i1 %v122, double %v121, double %v111
210 %v124 = fcmp ogt double %v121, %v111
211 %v125 = select i1 %v124, double %v121, double %v111
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| D | aggr-licm.ll | 131 %v111 = or i64 %v110, %v105
142 %v122 = or i64 %v121, %v111
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| D | expand-vstorerw-undef2.ll | 170 …%v111 = tail call <64 x i32> @llvm.hexagon.V6.vshuffvdd.128B(<32 x i32> %v110, <32 x i32> %v103, i…
171 %v112 = tail call <32 x i32> @llvm.hexagon.V6.hi.128B(<64 x i32> %v111)
172 %v113 = tail call <32 x i32> @llvm.hexagon.V6.lo.128B(<64 x i32> %v111)
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| D | swp-epilog-phi7.ll | 138 %v111 = phi <16 x i32>* [ %v9, %b1 ], [ %v148, %b2 ]
175 %v148 = getelementptr inbounds <16 x i32>, <16 x i32>* %v111, i32 1
176 store <16 x i32> %v147, <16 x i32>* %v111, align 64, !tbaa !0
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| D | registerscavenger-fail1.ll | 213 %v111 = icmp sgt i32 %v106, 0
229 br i1 %v111, label %b30, label %b35
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| D | late_instr.ll | 141 %v111 = getelementptr <16 x i32>, <16 x i32>* %v62, i32 %v110
149 %v116 = phi <16 x i32>* [ %v111, %b5 ], [ %v62, %b2 ]
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| D | cext-ice.ll | 228 %v111 = load i32, i32* %v14, align 4, !tbaa !0
229 store volatile i32 %v111, i32* %v4, align 4, !tbaa !0
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| D | large-number-of-preds.ll | 180 %v111 = getelementptr inbounds [64 x float], [64 x float]* %v0, i32 0, i32 25
181 store float %v109, float* %v111, align 4, !tbaa !0
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| D | swp-sigma.ll | 183 %v111 = getelementptr inbounds <16 x i32>, <16 x i32>* %v41, i32 1
186 %v114 = select i1 %v109, <16 x i32>* %v111, <16 x i32>* %v41
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| D | reg-scavengebug.ll | 145 %v111 = tail call <16 x i32> @llvm.hexagon.V6.vaddw(<16 x i32> %v108, <16 x i32> %v109)
147 …%v113 = tail call <16 x i32> @llvm.hexagon.V6.vmpyiwh.acc(<16 x i32> %v7, <16 x i32> %v111, i32 53…
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| D | regscavenger_fail_hwloop.ll | 136 %v111 = icmp ne i32 %v110, 0
139 %v114 = select i1 %v111, i32 %v113, i32 %v109
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| D | reg-scav-imp-use-dbl-vec.ll | 205 %v111 = add i32 %v105, %v30
206 %v112 = shl nsw i32 %v111, 6
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| D | lsr-post-inc-cross-use-offsets.ll | 174 %v111 = add nsw i32 %v110, -129
175 %v112 = getelementptr inbounds i8, i8* %v1, i32 %v111
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| D | reg-scavengebug-5.ll | 135 %v111 = tail call <16 x i32> @llvm.hexagon.V6.vlalignbi(<16 x i32> %v106, <16 x i32> %v87, i32 1)
156 %v132 = tail call <32 x i32> @llvm.hexagon.V6.vcombine(<16 x i32> %v122, <16 x i32> %v111)
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| D | opt-glob-addrs-003.ll | 203 %v111 = zext i1 %v110 to i16
204 %v112 = add nuw nsw i16 %v111, %v107
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| D | hrc-stack-coloring.ll | 152 %v111 = fadd double %v107, %v110
156 %v115 = fsub double %v111, %v114
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| D | concat-vectors-legalize.ll | 164 %v111 = icmp slt i32 %v99, %v9
165 %v112 = or i1 %v111, %v110
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/LoopVectorize/Hexagon/ |
| D | minimum-vf.ll | 139 %v111 = mul nsw i16 %v110, -5
140 %v112 = add i16 %v111, %v106
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| /external/mesa3d/src/gallium/auxiliary/gallivm/ |
| D | lp_bld_arit.h | 166 LLVMValueRef v111,
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| D | lp_bld_arit.c | 1584 LLVMValueRef v111, in lp_build_lerp_3d() argument
1588 LLVMValueRef v1 = lp_build_lerp_2d(bld, x, y, v100, v101, v110, v111, flags); in lp_build_lerp_3d()
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| /external/mesa3d/src/gallium/drivers/softpipe/ |
| D | sp_tex_sample.c | 103 float v001, float v101, float v011, float v111) in lerp_3d() argument
106 const float temp1 = lerp_2d(a, b, v001, v101, v011, v111); in lerp_3d()
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| /external/mesa3d/src/mesa/swrast/ |
| D | s_texfilter.c | 81 GLfloat v001, GLfloat v101, GLfloat v011, GLfloat v111) in lerp_3d() argument
86 const GLfloat temp11 = LERP(a, v011, v111); in lerp_3d()
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