Searched refs:v2d (Results 1 – 9 of 9) sorted by relevance
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
| D | AArch64SchedKryoDetails.td | 1018 (instregex "LD1(One(v16b|v8h|v4s|v2d)|i64)$")>;
1036 (instregex "LD1(One(v16b|v8h|v4s|v2d)|i64)_POST$")>;
1048 (instregex "LD1Three(v16b|v8h|v4s|v2d)$")>;
1060 (instregex "LD1Four(v16b|v8h|v4s|v2d)_POST$")>;
1066 (instregex "LD1Three(v16b|v8h|v4s|v2d)_POST$")>;
1078 (instregex "LD1Four(v16b|v8h|v4s|v2d)$")>;
1102 (instregex "LD(1|2)Two(v16b|v8h|v4s|v2d)$")>;
1114 (instregex "LD(1|2)Two(v16b|v8h|v4s|v2d)_POST$")>;
1126 (instregex "LD1R(v16b|v8h|v4s|v2d)$")>;
1138 (instregex "LD1R(v16b|v8h|v4s|v2d)_POST$")>;
[all …]
|
| D | AArch64SchedFalkorDetails.td | 994 …(instregex "^ST1(One(v8b|v4h|v2s|v1d)|(i8|i16|i32|i64)|One(v16b|v8h|v4s|v2d)|Two(v8b|v4h|v2s|v1d))…
1000 … (instregex "^ST1(One(v16b|v8h|v4s|v2d)|Two(v8b|v4h|v2s|v1d))_POST$")>;
1005 … (instregex "^ST1(Two(v16b|v8h|v4s|v2d)|(Three|Four)(v8b|v4h|v2s|v1d))$")>;
1007 (instregex "^ST2Two(v16b|v8h|v4s|v2d)$")>;
1014 … (instregex "^ST1(Two(v16b|v8h|v4s|v2d)|(Three|Four)(v8b|v4h|v2s|v1d))_POST$")>;
1017 (instregex "^ST2Two(v16b|v8h|v4s|v2d)_POST$")>;
1032 (instregex "^ST1Three(v16b|v8h|v4s|v2d)$")>;
1037 (instregex "^ST1Three(v16b|v8h|v4s|v2d)_POST$")>;
1049 (instregex "^ST1Four(v16b|v8h|v4s|v2d)$")>;
1054 (instregex "^ST1Four(v16b|v8h|v4s|v2d)_POST$")>;
|
| D | AArch64InstrFormats.td | 8786 def v2d : BaseSIMDLdSt<1, 1, opcode, 0b11, asm,
8859 def v2d : BaseSIMDLdSt<1, 0, opcode, 0b11, asm, (outs),
9116 def v2d : BaseSIMDLdR<1, R, opcode, S, 0b11, asm,
|
| /external/llvm/lib/Target/AArch64/ |
| D | AArch64SchedKryoDetails.td | 1000 (instregex "LD1(One(v16b|v8h|v4s|v2d)|i64)$")>;
1018 (instregex "LD1(One(v16b|v8h|v4s|v2d)|i64)_POST$")>;
1030 (instregex "LD1Three(v16b|v8h|v4s|v2d)$")>;
1042 (instregex "LD1Four(v16b|v8h|v4s|v2d)_POST$")>;
1048 (instregex "LD1Three(v16b|v8h|v4s|v2d)_POST$")>;
1060 (instregex "LD1Four(v16b|v8h|v4s|v2d)$")>;
1084 (instregex "LD(1|2)Two(v16b|v8h|v4s|v2d)$")>;
1096 (instregex "LD(1|2)Two(v16b|v8h|v4s|v2d)_POST$")>;
1108 (instregex "LD1R(v16b|v8h|v4s|v2d)$")>;
1120 (instregex "LD1R(v16b|v8h|v4s|v2d)_POST$")>;
[all …]
|
| D | AArch64InstrFormats.td | 8308 def v2d : BaseSIMDLdSt<1, 1, opcode, 0b11, asm,
8381 def v2d : BaseSIMDLdSt<1, 0, opcode, 0b11, asm, (outs),
8638 def v2d : BaseSIMDLdR<1, R, opcode, S, 0b11, asm,
|
| /external/eigen/Eigen/src/Core/arch/ZVector/ |
| D | PacketMath.h | 58 Packet2d v2d; member
256 vt.v2d = v;
363 return vfrom->v2d;
390 vto->v2d = from;
|
| /external/eigen/unsupported/test/ |
| D | openglsupport.cpp | 325 VERIFY_UNIFORM(dv,v2d, Vector2d); in test_openglsupport()
|
| /external/python/cpython2/Modules/ |
| D | cstubs | 1353 void v2d double s[2]
|
| D | glmodule.c | 7118 v2d( arg1 ); in gl_v2d()
|