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/external/clang/test/CodeGen/
Dbuiltins-hexagon.c6 int v32 __attribute__((__vector_size__(128))); in foo() local
1757 __builtin_HEXAGON_V6_extractw_128B(v32, 0); in foo()
1763 __builtin_HEXAGON_V6_hi(v32); in foo()
1767 __builtin_HEXAGON_V6_lo(v32); in foo()
1773 __builtin_HEXAGON_V6_pred_and_128B(v32, v32); in foo()
1775 __builtin_HEXAGON_V6_pred_and_n_128B(v32, v32); in foo()
1781 __builtin_HEXAGON_V6_pred_not_128B(v32); in foo()
1785 __builtin_HEXAGON_V6_pred_or_128B(v32, v32); in foo()
1787 __builtin_HEXAGON_V6_pred_or_n_128B(v32, v32); in foo()
1797 __builtin_HEXAGON_V6_pred_xor_128B(v32, v32); in foo()
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AMDGPU/
Dcall-preserved-registers.ll28 ; GCN: v_writelane_b32 v32, s33, 0
29 ; GCN: v_writelane_b32 v32, s34, 1
30 ; GCN: v_writelane_b32 v32, s35, 2
31 ; GCN: v_writelane_b32 v32, s36, 3
32 ; GCN: v_writelane_b32 v32, s37, 4
42 ; GCN: v_readlane_b32 s37, v32, 4
43 ; GCN: v_readlane_b32 s36, v32, 3
44 ; GCN: v_readlane_b32 s35, v32, 2
45 ; GCN: v_readlane_b32 s34, v32, 1
46 ; GCN: v_readlane_b32 s33, v32, 0
[all …]
Dcallee-frame-setup.ll40 ; GCN: buffer_store_dword v32, off, s[0:3], s5 offset:8
42 ; GCN-DAG: v_writelane_b32 v32, s33,
43 ; GCN-DAG: v_writelane_b32 v32, s34,
44 ; GCN-DAG: v_writelane_b32 v32, s35,
56 ; GCN: buffer_load_dword v32, off, s[0:3], s5 offset:8
75 ; GCN: buffer_store_dword v32, off, s[0:3], s5 offset:4
76 ; GCN-DAG: v_writelane_b32 v32, s33, 0
77 ; GCN-DAG: v_writelane_b32 v32, s34, 1
82 ; GCN-DAG: v_readlane_b32 s34, v32, 1
83 ; GCN-DAG: v_readlane_b32 s33, v32, 0
[all …]
Dnested-calls.ll14 ; GCN: buffer_store_dword v32, off, s[0:3], s5 offset:4
16 ; GCN-DAG: v_writelane_b32 v32, s33, 0
17 ; GCN-DAG: v_writelane_b32 v32, s34, 1
18 ; GCN-DAG: v_writelane_b32 v32, s35, 2
22 ; GCN: v_readlane_b32 s35, v32, 2
23 ; GCN: v_readlane_b32 s34, v32, 1
24 ; GCN: v_readlane_b32 s33, v32, 0
25 ; GCN: buffer_load_dword v32, off, s[0:3], s5 offset:4
Dspill-csr-frame-ptr-reg-copy.ll7 ; GCN: buffer_store_dword v32, off, s[0:3], s5 offset:8 ; 4-byte Folded Spill
8 ; GCN: v_writelane_b32 v32, s5, 2
10 ; GCN: v_readlane_b32 s5, v32, 2
13 ; GCN: buffer_load_dword v32, off, s[0:3], s5 offset:8 ; 4-byte Folded Reload
Dcall-graph-register-usage.ll16 ; GCN: v_writelane_b32 v32, s33, 0
17 ; GCN: v_writelane_b32 v32, s34, 1
18 ; GCN: v_writelane_b32 v32, s35, 2
20 ; GCN: v_readlane_b32 s35, v32, 2
21 ; GCN: v_readlane_b32 s34, v32, 1
22 ; GCN: v_readlane_b32 s33, v32, 0
Dcallee-special-input-vgprs.ll234 ; GCN: buffer_store_dword v32, off, s[0:3], s5 offset:8 ; 4-byte Folded Spill
235 ; GCN: buffer_load_dword v32, off, s[0:3], s5 offset:4{{$}}
236 ; GCN: flat_store_dword v{{\[[0-9]+:[0-9]+]}}, v32
238 ; GCN: buffer_load_dword v32, off, s[0:3], s5 offset:8 ; 4-byte Folded Reload
329 ; GCN: buffer_store_dword v32, off, s[0:3], s5 offset:8 ; 4-byte Folded Spill
331 ; GCN: buffer_load_dword v32, off, s[0:3], s5 offset:4
333 ; GCN: buffer_store_dword v32, off, s[0:3], s32 offset:8{{$}}
337 ; GCN: buffer_load_dword v32, off, s[0:3], s5 offset:8 ; 4-byte Folded Reload
360 ; GCN: buffer_store_dword v32, off, s[0:3], s5 offset:12 ; 4-byte Folded Spill
361 ; GCN: buffer_load_dword v32, off, s[0:3], s5 offset:8
[all …]
/external/iptables/extensions/
Dlibxt_HMARK.c101 .flags = XTOPT_PUT, XTOPT_POINTER(hi, port_mask.v32)
116 .flags = XTOPT_PUT, XTOPT_POINTER(hi, port_set.v32)
172 memset(&info->port_mask.v32, 0xff, sizeof(info->port_mask.v32)); in hmark_parse()
221 info->port_set.v32 = htonl(cb->val.u32); in HMARK_parse()
241 info->port_mask.v32 = htonl(cb->val.u32); in HMARK_parse()
297 printf("spi-mask 0x%x ", htonl(info->port_mask.v32)); in HMARK_print()
303 printf("spi 0x%x ", htonl(info->port_set.v32)); in HMARK_print()
363 htonl(info->port_mask.v32)); in HMARK_save()
371 printf(" --hmark-spi 0x%08x", htonl(info->port_set.v32)); in HMARK_save()
/external/perf_data_converter/src/quipper/
Dsample_info_reader_test.cc41 PunU32U64{.v32 = {0x68d, 0x68e}}.v64, // TID (u32 pid, tid) in TEST()
103 PunU32U64{.v32 = {0x68d, 0x68e}}.v64, // TID (u32 pid, tid) in TEST()
162 PunU32U64{.v32 = {0x68d, 0x68e}}.v64, // TID (u32 pid, tid) in TEST()
223 PunU32U64{.v32 = {0x68d, 0x68e}}.v64, // TID (u32 pid, tid) in TEST()
275 PunU32U64{.v32 = {0x68d, 0x68e}}.v64, // TID (u32 pid, tid) in TEST()
315 PunU32U64{.v32 = {0x68d, 0x68e}}.v64, // TID (u32 pid, tid) in TEST()
353 PunU32U64{.v32 = {0x68d, 0x68e}}.v64, // TID (u32 pid, tid) in TEST()
/external/swiftshader/third_party/subzero/tests_lit/reader_tests/
Dcasts.ll14 %v32 = trunc i64 %v to i32
15 ret i32 %v32
74 %v32 = zext i1 %v to i32
92 %v32 = zext i8 %v to i32
94 ret i32 %v32
108 %v32 = zext i16 %v to i32
136 %v32 = sext i1 %v to i32
138 ret i32 %v32
154 %v32 = sext i8 %v to i32
170 %v32 = sext i16 %v to i32
[all …]
/external/pdfium/third_party/libtiff/
Dtif_dir.c174 uint32 v32, i, v; in _TIFFVSetField() local
294 v32 = (uint32) va_arg(ap, uint32); in _TIFFVSetField()
295 if (v32 == 0) in _TIFFVSetField()
297 td->td_rowsperstrip = v32; in _TIFFVSetField()
299 td->td_tilelength = v32; in _TIFFVSetField()
360 v32 = (uint32)(1L<<td->td_bitspersample); in _TIFFVSetField()
361 _TIFFsetShortArray(&td->td_colormap[0], va_arg(ap, uint16*), v32); in _TIFFVSetField()
362 _TIFFsetShortArray(&td->td_colormap[1], va_arg(ap, uint16*), v32); in _TIFFVSetField()
363 _TIFFsetShortArray(&td->td_colormap[2], va_arg(ap, uint16*), v32); in _TIFFVSetField()
377 v32 = (uint32) va_arg(ap, uint32); in _TIFFVSetField()
[all …]
/external/deqp-deps/glslang/Test/baseResults/
Dspv.swizzleInversion.frag.out21 Name 40 "v32"
51 40(v32): 16(ptr) Variable Function
70 Store 40(v32) 42
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Hexagon/loop-idiom/
Dpmpy-mod.ll8 …:32:32-a:0-n16:32-i64:64:64-i32:32:32-i16:16:16-i1:8:8-f32:32:32-f64:64:64-v32:32:32-v64:64:64-v51…
56 %v32 = trunc i32 %v31 to i16
61 %v35 = zext i16 %v32 to i32
67 %v39 = zext i16 %v32 to i32
Dpmpy-long-loop.ll12 …:32:32-a:0-n16:32-i64:64:64-i32:32:32-i16:16:16-i1:8:8-f32:32:32-f64:64:64-v32:32:32-v64:64:64-v51…
50 %v32 = add i32 %v31, undef
51 %v33 = add i32 %v32, %v19
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Hexagon/
Dhrc-stack-coloring.ll60 %v32 = alloca double, align 8
65 store double 1.000000e+00, double* %v32, align 8
71 %v39 = load double, double* %v32, align 8
79 %v46 = load double, double* %v32, align 8
87 %v53 = load double, double* %v32, align 8
95 %v60 = load double, double* %v32, align 8
103 %v67 = load double, double* %v32, align 8
111 %v74 = load double, double* %v32, align 8
119 %v81 = load double, double* %v32, align 8
296 %v245 = load double, double* %v32, align 8
[all …]
Dwcsrtomb.ll76 %v32 = phi i32 [ %a2, %b4 ], [ %v65, %b21 ]
83 %v39 = icmp ult i32 %v32, %v38
109 %v53 = icmp ult i32 %v32, %v50
143 %v65 = sub i32 %v32, %v50
144 %v66 = icmp eq i32 %v32, %v50
Dusr-ovf-dep.ll2 target datalayout = "e-m:e-p:32:32-i1:32-i64:64-a:0-v32:32-n16:32"
11 target datalayout = "e-m:e-p:32:32-i1:32-i64:64-a:0-v32:32-n16:32"
Dvect_setcc.ll59 %v14 = add <2 x i32> %v31, %v32
68 %v20 = phi <2 x i32> [ zeroinitializer, %b0 ], [ %v32, %b12 ]
80 %v32 = add <2 x i32> %v20, %v30
/external/llvm/test/CodeGen/Hexagon/
Dusr-ovf-dep.ll2 target datalayout = "e-m:e-p:32:32-i1:32-i64:64-a:0-v32:32-n16:32"
11 target datalayout = "e-m:e-p:32:32-i1:32-i64:64-a:0-v32:32-n16:32"
/external/openssh/regress/unittests/sshbuf/
Dtest_sshbuf_getput_basic.c34 u_int32_t v32; in sshbuf_getput_basic_tests() local
136 ASSERT_INT_EQ(sshbuf_get_u32(p1, &v32), 0); in sshbuf_getput_basic_tests()
137 ASSERT_U32_EQ(v32, 0x11223344); in sshbuf_getput_basic_tests()
139 ASSERT_INT_EQ(sshbuf_get_u32(p1, &v32), 0); in sshbuf_getput_basic_tests()
140 ASSERT_U32_EQ(v32, 0x55667788); in sshbuf_getput_basic_tests()
146 r = sshbuf_get_u32(p1, &v32); in sshbuf_getput_basic_tests()
/external/llvm/test/CodeGen/AArch64/
Darm64-anyregcc-crash.ll9 … i64 %v25, i64 %v26, i64 %v27, i64 %v28, i64 %v29, i64 %v30, i64 %v31, i64 %v32) {
15 i64 %v25, i64 %v26, i64 %v27, i64 %v28, i64 %v29, i64 %v30, i64 %v31, i64 %v32)
/external/llvm/test/TableGen/
DTwoLevelName.td25 defm v32#NAME : OT1<!strconcat("v32", ss), 32, w>;
/external/llvm/test/CodeGen/PowerPC/
Dppc64-anyregcc-crash.ll9 … i64 %v25, i64 %v26, i64 %v27, i64 %v28, i64 %v29, i64 %v30, i64 %v31, i64 %v32) {
15 i64 %v25, i64 %v26, i64 %v27, i64 %v28, i64 %v29, i64 %v30, i64 %v31, i64 %v32)
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/PowerPC/
Dppc64-anyregcc-crash.ll9 … i64 %v25, i64 %v26, i64 %v27, i64 %v28, i64 %v29, i64 %v30, i64 %v31, i64 %v32) {
15 i64 %v25, i64 %v26, i64 %v27, i64 %v28, i64 %v29, i64 %v30, i64 %v31, i64 %v32)
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AArch64/
Darm64-anyregcc-crash.ll9 … i64 %v25, i64 %v26, i64 %v27, i64 %v28, i64 %v29, i64 %v30, i64 %v31, i64 %v32) {
15 i64 %v25, i64 %v26, i64 %v27, i64 %v28, i64 %v29, i64 %v30, i64 %v31, i64 %v32)

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