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Searched refs:v3d_device_info (Results 1 – 25 of 25) sorted by relevance

/external/mesa3d/src/gallium/drivers/vc5/
Dvc5_formats.c41 get_format(const struct v3d_device_info *devinfo, enum pipe_format f) in get_format()
50 vc5_rt_format_supported(const struct v3d_device_info *devinfo, in vc5_rt_format_supported()
62 vc5_get_rt_format(const struct v3d_device_info *devinfo, enum pipe_format f) in vc5_get_rt_format()
73 vc5_tex_format_supported(const struct v3d_device_info *devinfo, in vc5_tex_format_supported()
82 vc5_get_tex_format(const struct v3d_device_info *devinfo, enum pipe_format f) in vc5_get_tex_format()
93 vc5_get_tex_return_size(const struct v3d_device_info *devinfo, in vc5_get_tex_return_size()
108 vc5_get_tex_return_channels(const struct v3d_device_info *devinfo, in vc5_get_tex_return_channels()
120 vc5_get_format_swizzle(const struct v3d_device_info *devinfo, enum pipe_format f) in vc5_get_format_swizzle()
132 vc5_get_internal_type_bpp_for_output_format(const struct v3d_device_info *devinfo, in vc5_get_internal_type_bpp_for_output_format()
Dvc5_context.h497 bool vc5_rt_format_supported(const struct v3d_device_info *devinfo,
499 bool vc5_tex_format_supported(const struct v3d_device_info *devinfo,
501 uint8_t vc5_get_rt_format(const struct v3d_device_info *devinfo, enum pipe_format f);
502 uint8_t vc5_get_tex_format(const struct v3d_device_info *devinfo, enum pipe_format f);
503 uint8_t vc5_get_tex_return_size(const struct v3d_device_info *devinfo,
506 uint8_t vc5_get_tex_return_channels(const struct v3d_device_info *devinfo,
508 const uint8_t *vc5_get_format_swizzle(const struct v3d_device_info *devinfo,
510 void vc5_get_internal_type_bpp_for_output_format(const struct v3d_device_info *devinfo,
Dvc5_screen.h49 struct v3d_device_info devinfo;
Dvc5_emit.c79 swizzled_border_color(const struct v3d_device_info *devinfo, in swizzled_border_color()
140 const struct v3d_device_info *devinfo = &vc5->screen->devinfo; in emit_one_texture()
Dvc5_simulator.c570 vc5_simulator_init_global(const struct v3d_device_info *devinfo) in vc5_simulator_init_global()
Dvc5_program.c266 const struct v3d_device_info *devinfo = &vc5->screen->devinfo; in vc5_setup_shared_key()
/external/mesa3d/src/broadcom/qpu/
Dqpu_instr.h40 struct v3d_device_info;
400 bool v3d_qpu_sig_pack(const struct v3d_device_info *devinfo,
403 bool v3d_qpu_sig_unpack(const struct v3d_device_info *devinfo,
408 v3d_qpu_flags_pack(const struct v3d_device_info *devinfo,
412 v3d_qpu_flags_unpack(const struct v3d_device_info *devinfo,
417 v3d_qpu_small_imm_pack(const struct v3d_device_info *devinfo,
422 v3d_qpu_small_imm_unpack(const struct v3d_device_info *devinfo,
427 v3d_qpu_instr_pack(const struct v3d_device_info *devinfo,
431 v3d_qpu_instr_unpack(const struct v3d_device_info *devinfo,
440 bool v3d_qpu_writes_r3(const struct v3d_device_info *devinfo,
[all …]
Dqpu_disasm.h31 const char *v3d_qpu_decode(const struct v3d_device_info *devinfo, const
34 const char *v3d_qpu_disasm(const struct v3d_device_info *devinfo, uint64_t inst);
36 void v3d_qpu_dump(const struct v3d_device_info *devinfo, const
Dqpu_pack.c216 v3d_qpu_sig_unpack(const struct v3d_device_info *devinfo, in v3d_qpu_sig_unpack()
236 v3d_qpu_sig_pack(const struct v3d_device_info *devinfo, in v3d_qpu_sig_pack()
294 v3d_qpu_small_imm_unpack(const struct v3d_device_info *devinfo, in v3d_qpu_small_imm_unpack()
306 v3d_qpu_small_imm_pack(const struct v3d_device_info *devinfo, in v3d_qpu_small_imm_pack()
323 v3d_qpu_flags_unpack(const struct v3d_device_info *devinfo, in v3d_qpu_flags_unpack()
372 v3d_qpu_flags_pack(const struct v3d_device_info *devinfo, in v3d_qpu_flags_pack()
706 v3d_qpu_add_unpack(const struct v3d_device_info *devinfo, uint64_t packed_inst, in v3d_qpu_add_unpack()
856 v3d_qpu_mul_unpack(const struct v3d_device_info *devinfo, uint64_t packed_inst, in v3d_qpu_mul_unpack()
928 v3d_qpu_add_pack(const struct v3d_device_info *devinfo, in v3d_qpu_add_pack()
1119 v3d_qpu_mul_pack(const struct v3d_device_info *devinfo, in v3d_qpu_mul_pack()
[all …]
Dqpu_disasm.c33 const struct v3d_device_info *devinfo;
313 v3d_qpu_decode(const struct v3d_device_info *devinfo, in v3d_qpu_decode()
341 v3d_qpu_disasm(const struct v3d_device_info *devinfo, uint64_t inst) in v3d_qpu_disasm()
351 v3d_qpu_dump(const struct v3d_device_info *devinfo, in v3d_qpu_dump()
Dqpu_instr.c580 v3d_qpu_writes_r3(const struct v3d_device_info *devinfo, in v3d_qpu_writes_r3()
604 v3d_qpu_writes_r4(const struct v3d_device_info *devinfo, in v3d_qpu_writes_r4()
633 v3d_qpu_writes_r5(const struct v3d_device_info *devinfo, in v3d_qpu_writes_r5()
669 v3d_qpu_sig_writes_address(const struct v3d_device_info *devinfo, in v3d_qpu_sig_writes_address()
/external/mesa3d/src/broadcom/clif/
Dclif_dump.h30 struct v3d_device_info;
33 struct clif_dump *clif_dump_init(const struct v3d_device_info *devinfo,
Dclif_private.h32 const struct v3d_device_info *devinfo;
Dclif_dump.c53 clif_dump_init(const struct v3d_device_info *devinfo, in clif_dump_init()
/external/mesa3d/src/broadcom/common/
Dv3d_device_info.h34 struct v3d_device_info { struct
/external/mesa3d/src/broadcom/compiler/
Dv3d_compiler.h392 const struct v3d_device_info *devinfo;
399 const struct v3d_device_info *devinfo;
610 const struct v3d_compiler *v3d_compiler_init(const struct v3d_device_info *devinfo);
671 bool vir_writes_r3(const struct v3d_device_info *devinfo, struct qinst *inst);
672 bool vir_writes_r4(const struct v3d_device_info *devinfo, struct qinst *inst);
Dqpu_schedule.c81 const struct v3d_device_info *devinfo;
280 const struct v3d_device_info *devinfo = state->devinfo; in calculate_deps()
544 writes_too_soon_after_write(const struct v3d_device_info *devinfo, in writes_too_soon_after_write()
641 qpu_merge_inst(const struct v3d_device_info *devinfo, in qpu_merge_inst()
729 choose_instruction_to_schedule(const struct v3d_device_info *devinfo, in choose_instruction_to_schedule()
889 dump_state(const struct v3d_device_info *devinfo, in dump_state()
1233 const struct v3d_device_info *devinfo = c->devinfo; in schedule_instructions()
1467 const struct v3d_device_info *devinfo = c->devinfo; in v3d_qpu_schedule_instructions()
Dvir.c210 vir_writes_r3(const struct v3d_device_info *devinfo, struct qinst *inst) in vir_writes_r3()
232 vir_writes_r4(const struct v3d_device_info *devinfo, struct qinst *inst) in vir_writes_r4()
499 v3d_compiler_init(const struct v3d_device_info *devinfo) in v3d_compiler_init()
Dqpu_validate.c104 const struct v3d_device_info *devinfo = state->c->devinfo; in qpu_validate_inst()
Dvir_dump.c149 vir_dump_sig_addr(const struct v3d_device_info *devinfo, in vir_dump_sig_addr()
/external/mesa3d/src/gallium/drivers/vc4/
Dvc4_cl_dump.c35 struct v3d_device_info devinfo = { in vc4_dump_cl()
/external/mesa3d/src/broadcom/
DMakefile.sources22 common/v3d_device_info.h \
/external/mesa3d/src/broadcom/qpu/tests/
Dqpu_disasm.c106 struct v3d_device_info devinfo = { }; in main()
/external/mesa3d/src/broadcom/cle/
Dv3d_decoder.h39 struct v3d_spec *v3d_spec_load(const struct v3d_device_info *devinfo);
Dv3d_decoder.c581 v3d_spec_load(const struct v3d_device_info *devinfo) in v3d_spec_load()