Searched refs:v3i32 (Results 1 – 18 of 18) sorted by relevance
| /external/llvm/test/CodeGen/X86/ |
| D | widen_cast-3.ll | 6 ; bitcast v12i8 to v3i32
|
| D | widen_arith-5.ll | 6 ; widen a v3i32 to v4i32 to do a vector multiple and a subtraction
|
| D | widen_conv-1.ll | 29 ; truncate v3i32 to v3i8
|
| D | masked_gather_scatter.ll | 1368 declare <3 x i32> @llvm.masked.gather.v3i32(<3 x i32*>, i32, <3 x i1>, <3 x i32>)
1532 …%res = call <3 x i32> @llvm.masked.gather.v3i32(<3 x i32*> %gep.random, i32 4, <3 x i1> %mask, <3 …
|
| /external/swiftshader/third_party/LLVM/test/CodeGen/X86/ |
| D | widen_cast-3.ll | 6 ; bitcast v12i8 to v3i32
|
| D | widen_arith-5.ll | 6 ; widen a v3i32 to v4i32 to do a vector multiple and a subtraction
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/X86/ |
| D | widen_cast-3.ll | 5 ; bitcast v12i8 to v3i32
|
| D | widen_arith-5.ll | 4 ; widen a v3i32 to v4i32 to do a vector multiple and a subtraction
|
| D | widen_conv-1.ll | 30 ; truncate v3i32 to v3i8
|
| D | oddshuffles.ll | 68 define void @v3i32(<2 x i32> %a, <2 x i32> %b, <3 x i32>* %p) nounwind {
69 ; SSE2-LABEL: v3i32:
77 ; SSE42-LABEL: v3i32:
84 ; AVX-LABEL: v3i32:
91 ; XOP-LABEL: v3i32:
|
| D | masked_memop.ll | 1367 call void @llvm.masked.store.v3i32(<3 x i32> %v, <3 x i32>* %p, i32 16, <3 x i1> %mask)
1370 declare void @llvm.masked.store.v3i32(<3 x i32>, <3 x i32>*, i32, <3 x i1>)
|
| D | masked_gather_scatter.ll | 1660 declare <3 x i32> @llvm.masked.gather.v3i32.v3p0i32(<3 x i32*>, i32, <3 x i1>, <3 x i32>)
1817 …%res = call <3 x i32> @llvm.masked.gather.v3i32.v3p0i32(<3 x i32*> %gep.random, i32 4, <3 x i1> %m…
|
| /external/mesa3d/src/amd/common/ |
| D | ac_llvm_build.h | 58 LLVMTypeRef v3i32; member
|
| D | ac_llvm_build.c | 81 ctx->v3i32 = LLVMVectorType(ctx->i32, 3); in ac_llvm_context_init()
|
| D | ac_nir_to_llvm.c | 815 add_arg(&args, ARG_SGPR, ctx->ac.v3i32, in create_function()
829 add_arg(&args, ARG_VGPR, ctx->ac.v3i32, in create_function()
1042 add_arg(&args, ARG_VGPR, ctx->ac.v3i32, NULL); /* persp pull model */ in create_function()
|
| /external/mesa3d/src/gallium/drivers/radeonsi/ |
| D | si_shader.c | 4664 LLVMTypeRef v3i32 = LLVMVectorType(ctx->i32, 3); in create_function() local
4897 add_arg_checked(&fninfo, ARG_VGPR, v3i32, SI_PARAM_PERSP_PULL_MODEL); in create_function()
4956 ctx->param_grid_size = add_arg(&fninfo, ARG_SGPR, v3i32); in create_function()
4958 ctx->param_block_size = add_arg(&fninfo, ARG_SGPR, v3i32); in create_function()
4966 ctx->param_thread_id = add_arg(&fninfo, ARG_VGPR, v3i32); in create_function()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/docs/ |
| D | GlobalISel.rst | 174 ``<3 x s32>`` ``v3i32`` ``<3 x i32>``
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AMDGPU/ |
| D | amdgpu-codegenprepare-i16-to-i32.ll | 1608 ; VI-NEXT: %[[R_32:[0-9]+]] = call <3 x i32> @llvm.bitreverse.v3i32(<3 x i32> %[[A_32]])
2136 ; VI-NEXT: %[[R_32:[0-9]+]] = call <3 x i32> @llvm.bitreverse.v3i32(<3 x i32> %[[A_32]])
|