Searched refs:v_mul_hi_u32_u24_e32 (Results 1 – 6 of 6) sorted by relevance
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AMDGPU/ |
D | mul_uint24-amdgcn.ll | 103 ; GCN: v_mul_hi_u32_u24_e32 [[RESULT:v[0-9]+]], 120 ; GCN: v_mul_hi_u32_u24_e32 [[RESULT:v[0-9]+]], 138 ; GCN-DAG: v_mul_hi_u32_u24_e32 187 ; GCN-DAG: v_mul_hi_u32_u24_e32 v[[MUL_HI:[0-9]+]], 207 ; GCN: v_mul_hi_u32_u24_e32 v[[MUL_HI:[0-9]+]],
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AMDGPU/ |
D | vop2.s | 170 v_mul_hi_u32_u24_e32 v1, v2, v3 label
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/external/llvm/test/MC/Disassembler/AMDGPU/ |
D | vop2_vi.txt | 36 # VI: v_mul_hi_u32_u24_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x12]
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/AMDGPU/ |
D | vop2_vi.txt | 36 # VI: v_mul_hi_u32_u24_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x12]
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D | gfx8_dasm_all.txt | 32601 # CHECK: v_mul_hi_u32_u24_e32 v5, v1, v2 ; encoding: [0x01,0x05,0x0a,0x12] 32604 # CHECK: v_mul_hi_u32_u24_e32 v255, v1, v2 ; encoding: [0x01,0x05,0xfe,0x13] 32607 # CHECK: v_mul_hi_u32_u24_e32 v5, v255, v2 ; encoding: [0xff,0x05,0x0a,0x12] 32610 # CHECK: v_mul_hi_u32_u24_e32 v5, s1, v2 ; encoding: [0x01,0x04,0x0a,0x12] 32613 # CHECK: v_mul_hi_u32_u24_e32 v5, s101, v2 ; encoding: [0x65,0x04,0x0a,0x12] 32616 # CHECK: v_mul_hi_u32_u24_e32 v5, flat_scratch_lo, v2 ; encoding: [0x66,0x04,0x0a,0x12] 32619 # CHECK: v_mul_hi_u32_u24_e32 v5, flat_scratch_hi, v2 ; encoding: [0x67,0x04,0x0a,0x12] 32622 # CHECK: v_mul_hi_u32_u24_e32 v5, vcc_lo, v2 ; encoding: [0x6a,0x04,0x0a,0x12] 32625 # CHECK: v_mul_hi_u32_u24_e32 v5, vcc_hi, v2 ; encoding: [0x6b,0x04,0x0a,0x12] 32628 # CHECK: v_mul_hi_u32_u24_e32 v5, tba_lo, v2 ; encoding: [0x6c,0x04,0x0a,0x12] [all …]
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D | gfx9_dasm_all.txt | 28233 # CHECK: v_mul_hi_u32_u24_e32 v5, v1, v2 ; encoding: [0x01,0x05,0x0a,0x12] 28236 # CHECK: v_mul_hi_u32_u24_e32 v255, v1, v2 ; encoding: [0x01,0x05,0xfe,0x13] 28239 # CHECK: v_mul_hi_u32_u24_e32 v5, v255, v2 ; encoding: [0xff,0x05,0x0a,0x12] 28242 # CHECK: v_mul_hi_u32_u24_e32 v5, s1, v2 ; encoding: [0x01,0x04,0x0a,0x12] 28245 # CHECK: v_mul_hi_u32_u24_e32 v5, s101, v2 ; encoding: [0x65,0x04,0x0a,0x12] 28248 # CHECK: v_mul_hi_u32_u24_e32 v5, flat_scratch_lo, v2 ; encoding: [0x66,0x04,0x0a,0x12] 28251 # CHECK: v_mul_hi_u32_u24_e32 v5, flat_scratch_hi, v2 ; encoding: [0x67,0x04,0x0a,0x12] 28254 # CHECK: v_mul_hi_u32_u24_e32 v5, vcc_lo, v2 ; encoding: [0x6a,0x04,0x0a,0x12] 28257 # CHECK: v_mul_hi_u32_u24_e32 v5, vcc_hi, v2 ; encoding: [0x6b,0x04,0x0a,0x12] 28260 # CHECK: v_mul_hi_u32_u24_e32 v5, m0, v2 ; encoding: [0x7c,0x04,0x0a,0x12] [all …]
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