vgpr0 (reference) in projects: external

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Searched refs:vgpr0 (Results 1 – 25 of 121) sorted by relevance

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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AMDGPU/GlobalISel/
D	legalize-extract-vector-elt.mir	`14 ; CHECK: $vgpr0 = COPY [[EVEC]](s32) 18 $vgpr0 = COPY %2 30 ; CHECK: $vgpr0 = COPY [[EVEC]](s32) 34 $vgpr0 = COPY %2 46 ; CHECK: $vgpr0 = COPY [[EVEC]](s32) 50 $vgpr0 = COPY %2 58 liveins: $vgpr0 60 ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 64 ; CHECK: $vgpr0 = COPY [[EVEC]](s32) 65 %0:_(s32) = COPY $vgpr0 [all …]`
D	regbankselect-mul.mir	`26 liveins: $sgpr0, $vgpr0 29 ; CHECK: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr0 32 %1:_(s32) = COPY $vgpr0 42 liveins: $sgpr0, $vgpr0 44 ; CHECK: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0 48 %0:_(s32) = COPY $vgpr0 59 liveins: $vgpr0, $vgpr1 61 ; CHECK: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0 64 %0:_(s32) = COPY $vgpr0`
D	regbankselect-add.mir	`26 liveins: $sgpr0, $vgpr0 29 ; CHECK: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr0 32 %1:_(s32) = COPY $vgpr0 42 liveins: $sgpr0, $vgpr0 44 ; CHECK: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0 48 %0:_(s32) = COPY $vgpr0 59 liveins: $vgpr0, $vgpr1 61 ; CHECK: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0 64 %0:_(s32) = COPY $vgpr0`
D	regbankselect-sub.mir	`26 liveins: $sgpr0, $vgpr0 29 ; CHECK: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr0 32 %1:_(s32) = COPY $vgpr0 42 liveins: $sgpr0, $vgpr0 44 ; CHECK: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0 48 %0:_(s32) = COPY $vgpr0 59 liveins: $vgpr0, $vgpr1 61 ; CHECK: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0 64 %0:_(s32) = COPY $vgpr0`
D	legalize-gep.mir	`62 liveins: $vgpr0, $vgpr1 65 ; CHECK: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0 68 ; CHECK: $vgpr0 = COPY [[GEP]](p3) 69 %0:_(p3) = COPY $vgpr0 73 $vgpr0 = COPY %2 80 liveins: $vgpr0, $vgpr1 83 ; CHECK: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 86 ; CHECK: $vgpr0 = COPY [[GEP]](p5) 87 %0:_(p5) = COPY $vgpr0 91 $vgpr0 = COPY %2`
D	regbankselect-and.mir	`27 liveins: $sgpr0, $vgpr0 30 ; CHECK: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr0 33 %1:_(s32) = COPY $vgpr0 43 liveins: $sgpr0, $vgpr0 45 ; CHECK: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0 49 %0:_(s32) = COPY $vgpr0 60 liveins: $vgpr0, $vgpr1 62 ; CHECK: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0 65 %0:_(s32) = COPY $vgpr0`
D	regbankselect-fadd.mir	`28 liveins: $sgpr0, $vgpr0 31 ; CHECK: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr0 34 %1:_(s32) = COPY $vgpr0 44 liveins: $sgpr0, $vgpr0 46 ; CHECK: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0 50 %0:_(s32) = COPY $vgpr0 61 liveins: $vgpr0, $vgpr1 63 ; CHECK: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0 66 %0:_(s32) = COPY $vgpr0`
D	regbankselect-or.mir	`27 liveins: $sgpr0, $vgpr0 30 ; CHECK: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr0 33 %1:_(s32) = COPY $vgpr0 43 liveins: $sgpr0, $vgpr0 45 ; CHECK: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0 49 %0:_(s32) = COPY $vgpr0 60 liveins: $vgpr0, $vgpr1 62 ; CHECK: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0 65 %0:_(s32) = COPY $vgpr0`
D	regbankselect-fmul.mir	`28 liveins: $sgpr0, $vgpr0 31 ; CHECK: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr0 34 %1:_(s32) = COPY $vgpr0 44 liveins: $sgpr0, $vgpr0 46 ; CHECK: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0 50 %0:_(s32) = COPY $vgpr0 61 liveins: $vgpr0, $vgpr1 63 ; CHECK: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0 66 %0:_(s32) = COPY $vgpr0`
D	regbankselect-xor.mir	`27 liveins: $sgpr0, $vgpr0 30 ; CHECK: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr0 33 %1:_(s32) = COPY $vgpr0 43 liveins: $sgpr0, $vgpr0 45 ; CHECK: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0 49 %0:_(s32) = COPY $vgpr0 60 liveins: $vgpr0, $vgpr1 62 ; CHECK: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0 65 %0:_(s32) = COPY $vgpr0`
D	regbankselect-shl.mir	`27 liveins: $sgpr0, $vgpr0 30 ; CHECK: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr0 33 %1:_(s32) = COPY $vgpr0 43 liveins: $sgpr0, $vgpr0 45 ; CHECK: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0 49 %0:_(s32) = COPY $vgpr0 60 liveins: $vgpr0, $vgpr1 62 ; CHECK: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0 65 %0:_(s32) = COPY $vgpr0`
D	regbankselect-icmp.mir	`27 liveins: $sgpr0, $vgpr0 30 ; CHECK: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr0 33 %1:_(s32) = COPY $vgpr0 43 liveins: $sgpr0, $vgpr0 46 ; CHECK: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr0 49 %1:_(s32) = COPY $vgpr0 59 liveins: $vgpr0, $vgpr1 61 ; CHECK: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0 64 %0:_(s32) = COPY $vgpr0`
D	regbankselect-fcmp.mir	`28 liveins: $sgpr0, $vgpr0 31 ; CHECK: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr0 34 %1:_(s32) = COPY $vgpr0 44 liveins: $sgpr0, $vgpr0 47 ; CHECK: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr0 51 %1:_(s32) = COPY $vgpr0 61 liveins: $vgpr0, $vgpr1 63 ; CHECK: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0 66 %0:_(s32) = COPY $vgpr0`
D	regbankselect-minnum.mir	`27 liveins: $sgpr0, $vgpr0 30 ; CHECK: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr0 33 %1:_(s32) = COPY $vgpr0 42 liveins: $sgpr0, $vgpr0 45 ; CHECK: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr0 49 %1:_(s32) = COPY $vgpr0 58 liveins: $vgpr0, $vgpr1 60 ; CHECK: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0 63 %0:_(s32) = COPY $vgpr0`
D	regbankselect-maxnum.mir	`27 liveins: $sgpr0, $vgpr0 30 ; CHECK: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr0 33 %1:_(s32) = COPY $vgpr0 42 liveins: $sgpr0, $vgpr0 45 ; CHECK: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr0 49 %1:_(s32) = COPY $vgpr0 58 liveins: $vgpr0, $vgpr1 60 ; CHECK: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0 63 %0:_(s32) = COPY $vgpr0`
D	regbankselect-amdgcn.cvt.pkrtz.mir	`27 liveins: $sgpr0, $vgpr0 30 ; CHECK: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr0 33 %1:_(s32) = COPY $vgpr0 42 liveins: $sgpr0, $vgpr0 45 ; CHECK: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr0 49 %1:_(s32) = COPY $vgpr0 58 liveins: $vgpr0, $vgpr1 60 ; CHECK: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0 63 %0:_(s32) = COPY $vgpr0`
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AMDGPU/
D	optimize-if-exec-masking.mir	162 - { reg: '$vgpr0' } 179 liveins: $vgpr0 182 $vcc = V_CMP_EQ_I32_e64 0, killed $vgpr0, implicit $exec 183 $vgpr0 = V_MOV_B32_e32 4, implicit $exec 195 …$vgpr0 = BUFFER_LOAD_DWORD_OFFSET $sgpr4_sgpr5_sgpr6_sgpr7, 0, 0, 0, 0, 0, implicit $exec :: (vola… 198 liveins: $vgpr0, $sgpr0_sgpr1 203 …BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, 0, 0, 0, 0, 0, implicit $exec :… 220 - { reg: '$vgpr0' } 237 liveins: $vgpr0 240 $vcc = V_CMP_EQ_I32_e64 0, killed $vgpr0, implicit $exec [all …]
D	memory-legalizer-region.mir	19 $vgpr0 = V_MOV_B32_e32 killed $sgpr2, implicit $exec, implicit $exec 20 …renamable $vgpr2 = DS_READ_B32 killed renamable $vgpr0, 1, 0, implicit $m0, implicit $exec :: (vol… 21 $vgpr0 = V_MOV_B32_e32 $sgpr0, implicit $exec, implicit-def $vgpr0_vgpr1, implicit $sgpr0_sgpr1 43 $vgpr0 = V_MOV_B32_e32 killed $sgpr2, implicit $exec, implicit $exec 44 …renamable $vgpr2 = DS_READ_B32 killed renamable $vgpr0, 0, 1, implicit $m0, implicit $exec :: (vol… 45 $vgpr0 = V_MOV_B32_e32 $sgpr0, implicit $exec, implicit-def $vgpr0_vgpr1, implicit $sgpr0_sgpr1 67 $vgpr0 = V_MOV_B32_e32 killed $sgpr2, implicit $exec, implicit $exec 68 …renamable $vgpr2 = DS_READ_B32 killed renamable $vgpr0, 0, 1, implicit $m0, implicit $exec :: (vol… 69 $vgpr0 = V_MOV_B32_e32 $sgpr0, implicit $exec, implicit-def $vgpr0_vgpr1, implicit $sgpr0_sgpr1 91 $vgpr0 = V_MOV_B32_e32 killed $sgpr2, implicit $exec, implicit $exec [all …]
D	memory-legalizer-local.mir	19 $vgpr0 = V_MOV_B32_e32 killed $sgpr2, implicit $exec, implicit $exec 20 …renamable $vgpr2 = DS_READ_B32 killed renamable $vgpr0, 0, 0, implicit $m0, implicit $exec :: (vol… 21 $vgpr0 = V_MOV_B32_e32 $sgpr0, implicit $exec, implicit-def $vgpr0_vgpr1, implicit $sgpr0_sgpr1 43 $vgpr0 = V_MOV_B32_e32 killed $sgpr2, implicit $exec, implicit $exec 44 …renamable $vgpr2 = DS_READ_B32 killed renamable $vgpr0, 0, 0, implicit $m0, implicit $exec :: (vol… 45 $vgpr0 = V_MOV_B32_e32 $sgpr0, implicit $exec, implicit-def $vgpr0_vgpr1, implicit $sgpr0_sgpr1 67 $vgpr0 = V_MOV_B32_e32 killed $sgpr2, implicit $exec, implicit $exec 68 …renamable $vgpr2 = DS_READ_B32 killed renamable $vgpr0, 0, 0, implicit $m0, implicit $exec :: (vol… 69 $vgpr0 = V_MOV_B32_e32 $sgpr0, implicit $exec, implicit-def $vgpr0_vgpr1, implicit $sgpr0_sgpr1 91 $vgpr0 = V_MOV_B32_e32 killed $sgpr2, implicit $exec, implicit $exec [all …]
D	vccz-corrupt-bug-workaround.mir	90 $vgpr0 = V_MOV_B32_e32 9, implicit $exec 91 …BUFFER_STORE_DWORD_OFFSET killed $vgpr0, killed $sgpr4_sgpr5_sgpr6_sgpr7, 0, 0, 0, 0, 0, implicit … 92 $vgpr0 = V_MOV_B32_e32 0, implicit $exec 98 $vgpr0 = V_MOV_B32_e32 100, implicit $exec 99 …BUFFER_STORE_DWORD_OFFSET killed $vgpr0, killed $sgpr4_sgpr5_sgpr6_sgpr7, 0, 0, 0, 0, 0, implicit … 100 $vgpr0 = V_MOV_B32_e32 1, implicit $exec 103 liveins: $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3:0x00000003 107 …BUFFER_STORE_DWORD_OFFSET killed $vgpr0, killed $sgpr0_sgpr1_sgpr2_sgpr3, 0, 0, 0, 0, 0, implicit … 114 # CHECK-NEXT: $vgpr0 = V_MOV_B32_e32 151 $vgpr0 = V_MOV_B32_e32 9, implicit $exec [all …]
D	memory-legalizer-multiple-mem-operands-atomics.mir	25 $vgpr0 = V_MOV_B32_e32 1, implicit $exec 26 …BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr8_sgpr9_sgpr10_sgpr11, $sgpr3, 4, 0, 0, 0, implicit … 30 $vgpr0 = V_MOV_B32_e32 2, implicit $exec 32 …BUFFER_STORE_DWORD_OFFEN killed $vgpr0, killed $vgpr1, $sgpr8_sgpr9_sgpr10_sgpr11, $sgpr3, 0, 0, 0… 41 $vgpr0 = V_MOV_B32_e32 32772, implicit $exec 50 $vgpr0 = V_MOV_B32_e32 4, implicit $exec 53 liveins: $sgpr3, $sgpr4_sgpr5, $sgpr8_sgpr9_sgpr10_sgpr11, $vgpr0, $sgpr0 57 $vgpr0 = V_ADD_I32_e32 killed $sgpr0, killed $vgpr0, implicit-def dead $vcc, implicit $exec 58 …$vgpr0 = BUFFER_LOAD_DWORD_OFFEN killed $vgpr0, killed $sgpr8_sgpr9_sgpr10_sgpr11, $sgpr3, 0, 0, 0… 62 …FLAT_STORE_DWORD killed $vgpr1_vgpr2, killed $vgpr0, 0, 0, 0, implicit $exec, implicit $flat_scr :…
D	waitcnt-permute.mir	`10 - { reg: '$vgpr0' } 15 liveins: $vgpr0, $vgpr1, $sgpr30_sgpr31 17 $vgpr0 = DS_BPERMUTE_B32 killed $vgpr0, killed $vgpr1, 0, implicit $exec 18 $vgpr0 = V_ADD_F32_e32 1065353216, killed $vgpr0, implicit $exec 19 S_SETPC_B64_return killed $sgpr30_sgpr31, implicit killed $vgpr0`
D	break-vmem-soft-clauses.mir	10 ; GCN: $vgpr0 = FLAT_LOAD_DWORD $vgpr2_vgpr3, 0, 0, 0, implicit $exec, implicit $flat_scr 13 $vgpr0 = FLAT_LOAD_DWORD $vgpr2_vgpr3, 0, 0, 0, implicit $exec, implicit $flat_scr 23 ; GCN: $vgpr0 = FLAT_LOAD_DWORD $vgpr2_vgpr3, 0, 0, 0, implicit $exec, implicit $flat_scr 27 $vgpr0 = FLAT_LOAD_DWORD $vgpr2_vgpr3, 0, 0, 0, implicit $exec, implicit $flat_scr 38 ; GCN: $vgpr0 = FLAT_LOAD_DWORD $vgpr3_vgpr4, 0, 0, 0, implicit $exec, implicit $flat_scr 43 $vgpr0 = FLAT_LOAD_DWORD $vgpr3_vgpr4, 0, 0, 0, implicit $exec, implicit $flat_scr 55 ; GCN: $vgpr0 = FLAT_LOAD_DWORD $vgpr4_vgpr5, 0, 0, 0, implicit $exec, implicit $flat_scr 61 $vgpr0 = FLAT_LOAD_DWORD $vgpr4_vgpr5, 0, 0, 0, implicit $exec, implicit $flat_scr 74 ; GCN: $vgpr0 = FLAT_LOAD_DWORD $vgpr2_vgpr3, 0, 0, 0, implicit $exec, implicit $flat_scr 78 $vgpr0 = FLAT_LOAD_DWORD $vgpr2_vgpr3, 0, 0, 0, implicit $exec, implicit $flat_scr [all …]
D	si-fix-sgpr-copies.mir	`21 liveins: $vgpr0 22 %7 = COPY $vgpr0 43 # GCN: %0:vgpr_32 = COPY $vgpr0 52 liveins: $vgpr0 53 %0:vgpr_32 = COPY $vgpr0 61 # GCN %2:vgpr_32 = COPY $vgpr0 70 liveins: $vgpr0 71 %0:sreg_32_xm0 = COPY $vgpr0`
D	waitcnt.mir	47 …$vgpr0 = FLAT_LOAD_DWORD $vgpr1_vgpr2, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 4 from… 49 $vgpr0 = V_MOV_B32_e32 $vgpr1, implicit $exec 54 $vgpr0 = FLAT_LOAD_DWORD $vgpr1_vgpr2, 0, 0, 0, implicit $exec, implicit $flat_scr 56 $vgpr0 = V_MOV_B32_e32 $vgpr1, implicit $exec 60 …$vgpr0 = FLAT_LOAD_DWORD $vgpr1_vgpr2, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 4 from… 62 $vgpr0 = V_MOV_B32_e32 $vgpr1, implicit $exec 70 # CHECK: $vgpr0 = FLAT_LOAD_DWORD $vgpr1_vgpr2 82 $vgpr0 = FLAT_LOAD_DWORD $vgpr1_vgpr2, 0, 0, 0, implicit $exec, implicit $flat_scr 86 FLAT_STORE_DWORD $vgpr3_vgpr4, $vgpr0, 0, 0, 0, implicit $exec, implicit $flat_scr 109 $vgpr0 = FLAT_LOAD_DWORD $vgpr1_vgpr2, 0, 0, 0, implicit $exec, implicit $flat_scr [all …]

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