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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AMDGPU/
Dllvm.amdgcn.tbuffer.store.ll41 define amdgpu_ps void @buffer_store_idx(<4 x i32> inreg, <4 x float> %vdata, i32 %vindex) {
44 …call void @llvm.amdgcn.tbuffer.store.v4i32(<4 x i32> %in1, <4 x i32> %0, i32 %vindex, i32 0, i32 0…
59 define amdgpu_ps void @buffer_store_both(<4 x i32> inreg, <4 x float> %vdata, i32 %vindex, i32 %vof…
62 …call void @llvm.amdgcn.tbuffer.store.v4i32(<4 x i32> %in1, <4 x i32> %0, i32 %vindex, i32 %voffset…
74 …ffer_store_wait(<4 x i32> inreg, <4 x float> %vdata, i32 %vindex.1, i32 %vindex.2, i32 %vindex.3) {
77 …call void @llvm.amdgcn.tbuffer.store.v4i32(<4 x i32> %in1, <4 x i32> %0, i32 %vindex.1, i32 0, i32…
78 …%data = call <4 x float> @llvm.amdgcn.buffer.load.format.v4f32(<4 x i32> %0, i32 %vindex.2, i32 0,…
80 …call void @llvm.amdgcn.tbuffer.store.v4i32(<4 x i32> %data.i, <4 x i32> %0, i32 %vindex.3, i32 0, …
86 define amdgpu_ps void @buffer_store_x1(<4 x i32> inreg %rsrc, float %data, i32 %vindex) {
89 …call void @llvm.amdgcn.tbuffer.store.i32(i32 %data.i, <4 x i32> %rsrc, i32 %vindex, i32 0, i32 0, …
[all …]
Dllvm.amdgcn.buffer.atomic.ll21 define amdgpu_ps float @test1(<4 x i32> inreg %rsrc, i32 %data, i32 %vindex, i32 %voffset) {
24 %o2 = call i32 @llvm.amdgcn.buffer.atomic.swap(i32 %o1, <4 x i32> %rsrc, i32 %vindex, i32 0, i1 0)
26 …%o4 = call i32 @llvm.amdgcn.buffer.atomic.swap(i32 %o3, <4 x i32> %rsrc, i32 %vindex, i32 %voffset…
54 define amdgpu_ps float @test2(<4 x i32> inreg %rsrc, i32 %data, i32 %vindex) {
56 …%t1 = call i32 @llvm.amdgcn.buffer.atomic.add(i32 %data, <4 x i32> %rsrc, i32 %vindex, i32 0, i1 0)
57 %t2 = call i32 @llvm.amdgcn.buffer.atomic.sub(i32 %t1, <4 x i32> %rsrc, i32 %vindex, i32 0, i1 0)
58 %t3 = call i32 @llvm.amdgcn.buffer.atomic.smin(i32 %t2, <4 x i32> %rsrc, i32 %vindex, i32 0, i1 0)
59 %t4 = call i32 @llvm.amdgcn.buffer.atomic.umin(i32 %t3, <4 x i32> %rsrc, i32 %vindex, i32 0, i1 0)
60 %t5 = call i32 @llvm.amdgcn.buffer.atomic.smax(i32 %t4, <4 x i32> %rsrc, i32 %vindex, i32 0, i1 0)
61 %t6 = call i32 @llvm.amdgcn.buffer.atomic.umax(i32 %t5, <4 x i32> %rsrc, i32 %vindex, i32 0, i1 0)
[all …]
Dllvm.amdgcn.tbuffer.store.d16.ll10 …_kernel void @tbuffer_store_d16_x(<4 x i32> %rsrc, [8 x i32], half %data, [8 x i32], i32 %vindex) {
12 …call void @llvm.amdgcn.tbuffer.store.f16(half %data, <4 x i32> %rsrc, i32 %vindex, i32 0, i32 0, i…
25 define amdgpu_kernel void @tbuffer_store_d16_xy(<4 x i32> %rsrc, <2 x half> %data, i32 %vindex) {
27 …call void @llvm.amdgcn.tbuffer.store.v2f16(<2 x half> %data, <4 x i32> %rsrc, i32 %vindex, i32 0, …
47 define amdgpu_kernel void @tbuffer_store_d16_xyzw(<4 x i32> %rsrc, <4 x half> %data, i32 %vindex) {
49 …call void @llvm.amdgcn.tbuffer.store.v4f16(<4 x half> %data, <4 x i32> %rsrc, i32 %vindex, i32 0, …
Dllvm.amdgcn.tbuffer.load.ll55 define amdgpu_vs <4 x float> @tbuffer_load_idx(<4 x i32> inreg, i32 %vindex) {
57 …%vdata = call <4 x i32> @llvm.amdgcn.tbuffer.load.v4i32(<4 x i32> %0, i32 %vindex, i32 0, i32 0,…
82 define amdgpu_vs <4 x float> @tbuffer_load_both(<4 x i32> inreg, i32 %vindex, i32 %voffs) {
84 …%vdata = call <4 x i32> @llvm.amdgcn.tbuffer.load.v4i32(<4 x i32> %0, i32 %vindex, i32 %voffs, i…
/external/llvm/test/CodeGen/AMDGPU/
Dllvm.amdgcn.buffer.atomic.ll20 define amdgpu_ps float @test1(<4 x i32> inreg %rsrc, i32 %data, i32 %vindex, i32 %voffset) {
23 %o2 = call i32 @llvm.amdgcn.buffer.atomic.swap(i32 %o1, <4 x i32> %rsrc, i32 %vindex, i32 0, i1 0)
25 …%o4 = call i32 @llvm.amdgcn.buffer.atomic.swap(i32 %o3, <4 x i32> %rsrc, i32 %vindex, i32 %voffset…
52 define amdgpu_ps float @test2(<4 x i32> inreg %rsrc, i32 %data, i32 %vindex) {
54 …%t1 = call i32 @llvm.amdgcn.buffer.atomic.add(i32 %data, <4 x i32> %rsrc, i32 %vindex, i32 0, i1 0)
55 %t2 = call i32 @llvm.amdgcn.buffer.atomic.sub(i32 %t1, <4 x i32> %rsrc, i32 %vindex, i32 0, i1 0)
56 %t3 = call i32 @llvm.amdgcn.buffer.atomic.smin(i32 %t2, <4 x i32> %rsrc, i32 %vindex, i32 0, i1 0)
57 %t4 = call i32 @llvm.amdgcn.buffer.atomic.umin(i32 %t3, <4 x i32> %rsrc, i32 %vindex, i32 0, i1 0)
58 %t5 = call i32 @llvm.amdgcn.buffer.atomic.smax(i32 %t4, <4 x i32> %rsrc, i32 %vindex, i32 0, i1 0)
59 %t6 = call i32 @llvm.amdgcn.buffer.atomic.umax(i32 %t5, <4 x i32> %rsrc, i32 %vindex, i32 0, i1 0)
[all …]
/external/apache-commons-bcel/src/main/java/org/apache/bcel/util/
DCodeHTML.java89 int vindex; in codeToHTML() local
202 vindex = bytes.readShort(); in codeToHTML()
205 vindex = bytes.readUnsignedByte(); in codeToHTML()
207 buf.append("%").append(vindex); in codeToHTML()
347 vindex = bytes.readShort(); in codeToHTML()
351 vindex = bytes.readUnsignedByte(); in codeToHTML()
354 buf.append("%").append(vindex).append(" ").append(constant); in codeToHTML()
/external/u-boot/drivers/power/
Daxp209.c117 static const unsigned int vindex[] = { in axp_set_aldo4() local
128 for (cfg = 15; vindex[cfg] > mvolt && cfg > 0; cfg--); in axp_set_aldo4()
/external/mesa3d/src/amd/common/
Dac_llvm_build.h213 LLVMValueRef vindex,
224 LLVMValueRef vindex,
232 LLVMValueRef vindex,
Dac_llvm_build.c948 LLVMValueRef vindex, in ac_build_buffer_load() argument
965 assert(vindex == NULL); in ac_build_buffer_load()
992 vindex ? vindex : LLVMConstInt(ctx->i32, 0, 0), in ac_build_buffer_load()
1013 LLVMValueRef vindex, in ac_build_buffer_load_format() argument
1019 vindex, in ac_build_buffer_load_format()
1033 LLVMValueRef vindex, in ac_build_buffer_load_format_gfx9_safe() argument
1048 return ac_build_buffer_load_format(ctx, new_rsrc, vindex, voffset, can_speculate); in ac_build_buffer_load_format_gfx9_safe()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/
DBUFInstructions.td1048 (vt (name v4i32:$rsrc, i32:$vindex,
1051 (!cast<MUBUF_Pseudo>(opcode # _IDXEN) $vindex, $rsrc, $soffset, (as_i16imm $offset),
1064 (vt (name v4i32:$rsrc, i32:$vindex,
1068 (REG_SEQUENCE VReg_64, $vindex, sub0, $voffset, sub1),
1105 (name vt:$vdata, v4i32:$rsrc, i32:$vindex,
1108 (!cast<MUBUF_Pseudo>(opcode # _IDXEN_exact) $vdata, $vindex, $rsrc, $soffset,
1123 (name vt:$vdata, v4i32:$rsrc, i32:$vindex,
1128 (REG_SEQUENCE VReg_64, $vindex, sub0, $voffset, sub1),
1168 (name i32:$vdata_in, v4i32:$rsrc, i32:$vindex,
1171 (!cast<MUBUF_Pseudo>(opcode # _IDXEN_RTN) $vdata_in, $vindex, $rsrc, $soffset,
[all …]
DSIInstrInfo.td75 SDTCisVT<2, i32>, // vindex(VGPR)
94 SDTCisVT<2, i32>, // vindex(VGPR)
116 SDTCisVT<2, i32>, // vindex
132 SDTCisVT<2, i32>, // vindex
151 SDTCisVT<3, i32>, // vindex
174 SDTCisVT<4, i32>, // vindex
/external/llvm/include/llvm/IR/
DIntrinsicsAMDGPU.td255 llvm_i32_ty, // vindex(VGPR)
267 llvm_i32_ty, // vindex(VGPR)
279 llvm_i32_ty, // vindex(VGPR)
298 llvm_i32_ty, // vindex(VGPR)
/external/apache-commons-bcel/src/main/java/org/apache/bcel/classfile/
DUtility.java191 int vindex; in codeToString() local
298 vindex = bytes.readUnsignedShort(); in codeToString()
301 vindex = bytes.readUnsignedByte(); in codeToString()
303 buf.append("\t\t%").append(vindex); in codeToString()
417 vindex = bytes.readUnsignedShort(); in codeToString()
421 vindex = bytes.readUnsignedByte(); in codeToString()
424 buf.append("\t\t%").append(vindex).append("\t").append(constant); in codeToString()
/external/pdfium/core/fpdfapi/font/
Dcpdf_cidfont.cpp605 uint32_t vindex = 0; in GetVerticalGlyph() local
606 m_pTTGSUBTable->GetVerticalGlyph(index, &vindex); in GetVerticalGlyph()
607 if (!vindex) in GetVerticalGlyph()
610 index = vindex; in GetVerticalGlyph()
/external/harfbuzz_ng/src/
Dhb-ot-shape-complex-hangul.cc307 unsigned int vindex = nindex / TCount; in preprocess_text_hangul() local
338 VBase + vindex, in preprocess_text_hangul()
/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/IR/
DIntrinsicsAMDGPU.td796 llvm_i32_ty, // vindex(VGPR)
809 llvm_i32_ty, // vindex(VGPR)
821 llvm_i32_ty, // vindex(VGPR)
836 llvm_i32_ty, // vindex(VGPR)
851 llvm_i32_ty, // vindex(VGPR)
871 llvm_i32_ty, // vindex(VGPR)
/external/llvm/lib/Target/AMDGPU/
DSIInstructions.td2164 (vt (name v4i32:$rsrc, i32:$vindex,
2167 (!cast<MUBUF>(opcode # _IDXEN) $vindex, $rsrc, $soffset, (as_i16imm $offset),
2180 (vt (name v4i32:$rsrc, i32:$vindex,
2184 (REG_SEQUENCE VReg_64, $vindex, sub0, $voffset, sub1),
2208 (name vt:$vdata, v4i32:$rsrc, i32:$vindex,
2211 (!cast<MUBUF>(opcode # _IDXEN) $vdata, $vindex, $rsrc, $soffset,
2226 (name vt:$vdata, v4i32:$rsrc, i32:$vindex,
2231 (REG_SEQUENCE VReg_64, $vindex, sub0, $voffset, sub1),
2257 (name i32:$vdata_in, v4i32:$rsrc, i32:$vindex,
2260 (!cast<MUBUF>(opcode # _RTN_IDXEN) $vdata_in, $vindex, $rsrc, $soffset,
[all …]
/external/python/dateutil/
DREADME.rst142 https://pgp.mit.edu/pks/lookup?op=vindex&search=0xCD54FCE3D964BEFB
/external/e2fsprogs/doc/
Dtexinfo.tex3596 % @vindex index-whatever
3625 % @findex, @vindex, @kindex, @cindex.
3630 \def\vindex {\vrindex}
/external/e2fsprogs/lib/et/
Dtexinfo.tex3596 % @vindex index-whatever
3625 % @findex, @vindex, @kindex, @cindex.
3630 \def\vindex {\vrindex}
/external/python/cpython2/Modules/_ctypes/libffi/
Dtexinfo.tex4839 % @vindex index-whatever
4868 % @findex, @vindex, @kindex, @cindex.
4873 \def\vindex {\vrindex}
/external/libffi/
Dtexinfo.tex4839 % @vindex index-whatever
4868 % @findex, @vindex, @kindex, @cindex.
4873 \def\vindex {\vrindex}