/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/ARM/ |
D | neon-reverse-encoding.s | 15 @ CHECK: vrev32.8 d16, d16 @ encoding: [0xa0,0x00,0xf0,0xf3] 16 vrev32.8 d16, d16 17 @ CHECK: vrev32.16 d16, d16 @ encoding: [0xa0,0x00,0xf4,0xf3] 18 vrev32.16 d16, d16 19 @ CHECK: vrev32.8 q8, q8 @ encoding: [0xe0,0x00,0xf0,0xf3] 20 vrev32.8 q8, q8 21 @ CHECK: vrev32.16 q8, q8 @ encoding: [0xe0,0x00,0xf4,0xf3] 22 vrev32.16 q8, q8
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D | neont2-reverse-encoding.s | 15 @ CHECK: vrev32.8 d16, d16 @ encoding: [0xf0,0xff,0xa0,0x00] 16 vrev32.8 d16, d16 17 @ CHECK: vrev32.16 d16, d16 @ encoding: [0xf4,0xff,0xa0,0x00] 18 vrev32.16 d16, d16 19 @ CHECK: vrev32.8 q8, q8 @ encoding: [0xf0,0xff,0xe0,0x00] 20 vrev32.8 q8, q8 21 @ CHECK: vrev32.16 q8, q8 @ encoding: [0xf4,0xff,0xe0,0x00] 22 vrev32.16 q8, q8
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/external/swiftshader/third_party/LLVM/test/MC/ARM/ |
D | neon-reverse-encoding.s | 15 @ CHECK: vrev32.8 d16, d16 @ encoding: [0xa0,0x00,0xf0,0xf3] 16 vrev32.8 d16, d16 17 @ CHECK: vrev32.16 d16, d16 @ encoding: [0xa0,0x00,0xf4,0xf3] 18 vrev32.16 d16, d16 19 @ CHECK: vrev32.8 q8, q8 @ encoding: [0xe0,0x00,0xf0,0xf3] 20 vrev32.8 q8, q8 21 @ CHECK: vrev32.16 q8, q8 @ encoding: [0xe0,0x00,0xf4,0xf3] 22 vrev32.16 q8, q8
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D | neont2-reverse-encoding.s | 15 @ CHECK: vrev32.8 d16, d16 @ encoding: [0xf0,0xff,0xa0,0x00] 16 vrev32.8 d16, d16 17 @ CHECK: vrev32.16 d16, d16 @ encoding: [0xf4,0xff,0xa0,0x00] 18 vrev32.16 d16, d16 19 @ CHECK: vrev32.8 q8, q8 @ encoding: [0xf0,0xff,0xe0,0x00] 20 vrev32.8 q8, q8 21 @ CHECK: vrev32.16 q8, q8 @ encoding: [0xf4,0xff,0xe0,0x00] 22 vrev32.16 q8, q8
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/external/llvm/test/MC/ARM/ |
D | neon-reverse-encoding.s | 15 @ CHECK: vrev32.8 d16, d16 @ encoding: [0xa0,0x00,0xf0,0xf3] 16 vrev32.8 d16, d16 17 @ CHECK: vrev32.16 d16, d16 @ encoding: [0xa0,0x00,0xf4,0xf3] 18 vrev32.16 d16, d16 19 @ CHECK: vrev32.8 q8, q8 @ encoding: [0xe0,0x00,0xf0,0xf3] 20 vrev32.8 q8, q8 21 @ CHECK: vrev32.16 q8, q8 @ encoding: [0xe0,0x00,0xf4,0xf3] 22 vrev32.16 q8, q8
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D | neont2-reverse-encoding.s | 15 @ CHECK: vrev32.8 d16, d16 @ encoding: [0xf0,0xff,0xa0,0x00] 16 vrev32.8 d16, d16 17 @ CHECK: vrev32.16 d16, d16 @ encoding: [0xf4,0xff,0xa0,0x00] 18 vrev32.16 d16, d16 19 @ CHECK: vrev32.8 q8, q8 @ encoding: [0xf0,0xff,0xe0,0x00] 20 vrev32.8 q8, q8 21 @ CHECK: vrev32.16 q8, q8 @ encoding: [0xf4,0xff,0xe0,0x00] 22 vrev32.16 q8, q8
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/external/capstone/suite/MC/ARM/ |
D | neon-reverse-encoding.s.cs | 8 0xa0,0x00,0xf0,0xf3 = vrev32.8 d16, d16 9 0xa0,0x00,0xf4,0xf3 = vrev32.16 d16, d16 10 0xe0,0x00,0xf0,0xf3 = vrev32.8 q8, q8 11 0xe0,0x00,0xf4,0xf3 = vrev32.16 q8, q8
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D | neont2-reverse-encoding.s.cs | 8 0xf0,0xff,0xa0,0x00 = vrev32.8 d16, d16 9 0xf4,0xff,0xa0,0x00 = vrev32.16 d16, d16 10 0xf0,0xff,0xe0,0x00 = vrev32.8 q8, q8 11 0xf4,0xff,0xe0,0x00 = vrev32.16 q8, q8
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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/ |
D | big-endian-neon-extend.ll | 21 ; CHECK-NEXT: vrev32.16 [[REG]], [[REG]] 51 ; CHECK-NEXT: vrev32.16 [[REG]], [[REG]] 68 ; CHECK-NEXT: vrev32.16 [[REG]], [[REG]] 70 ; CHECK-NEXT: vrev32.16 [[REG]], {{d[0-9]+}} 82 ; CHECK-NEXT: vrev32.8 [[REG]], [[REG]] 97 ; CHECK-NEXT: vrev32.8 [[REG]], [[REG]]
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D | big-endian-neon-trunc-store.ll | 6 ; CHECK: vrev32.16 [[REG]], [[REG]] 8 ; CHECK: vrev32.16 [[REG]], [[REG2]] 20 ; CHECK: vrev32.8 [[REG]], [[REG2]]
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D | vrev.ll | 69 ;CHECK: vrev32.8 77 ;CHECK: vrev32.16 85 ;CHECK: vrev32.8 93 ;CHECK: vrev32.16 127 ;CHECK: vrev32.16 183 ; CHECK: vrev32.8
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D | big-endian-neon-bitconv.ll | 191 ; CHECK: vrev32.8 201 ; CHECK: vrev32.8 212 ; CHECK: vrev32.16 222 ; CHECK: vrev32.16 296 ; CHECK: vrev32.8 306 ; CHECK: vrev32.8 317 ; CHECK: vrev32.16 327 ; CHECK: vrev32.16
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D | popcnt.ll | 51 ; CHECK: vrev32.16 {{d[0-9]+}}, {{d[0-9]+}} 66 ; CHECK: vrev32.16 {{q[0-9]+}}, {{q[0-9]+}}
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/external/llvm/test/CodeGen/ARM/ |
D | big-endian-neon-extend.ll | 21 ; CHECK-NEXT: vrev32.16 [[REG]], [[REG]] 51 ; CHECK-NEXT: vrev32.16 [[REG]], [[REG]] 68 ; CHECK-NEXT: vrev32.16 [[REG]], [[REG]] 70 ; CHECK-NEXT: vrev32.16 [[REG]], {{d[0-9]+}} 82 ; CHECK-NEXT: vrev32.8 [[REG]], [[REG]] 97 ; CHECK-NEXT: vrev32.8 [[REG]], [[REG]]
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D | big-endian-neon-trunc-store.ll | 6 ; CHECK: vrev32.16 [[REG]], [[REG]] 8 ; CHECK: vrev32.16 [[REG]], [[REG2]] 20 ; CHECK: vrev32.8 [[REG]], [[REG2]]
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D | vrev.ll | 69 ;CHECK: vrev32.8 77 ;CHECK: vrev32.16 85 ;CHECK: vrev32.8 93 ;CHECK: vrev32.16 127 ;CHECK: vrev32.16 183 ; CHECK: vrev32.8
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D | big-endian-neon-bitconv.ll | 191 ; CHECK: vrev32.8 201 ; CHECK: vrev32.8 212 ; CHECK: vrev32.16 222 ; CHECK: vrev32.16 296 ; CHECK: vrev32.8 306 ; CHECK: vrev32.8 317 ; CHECK: vrev32.16 327 ; CHECK: vrev32.16
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D | popcnt.ll | 51 ; CHECK: vrev32.16 {{d[0-9]+}}, {{d[0-9]+}} 66 ; CHECK: vrev32.16 {{q[0-9]+}}, {{q[0-9]+}}
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/external/swiftshader/third_party/LLVM/test/CodeGen/ARM/ |
D | vrev.ll | 69 ;CHECK: vrev32.8 77 ;CHECK: vrev32.16 85 ;CHECK: vrev32.8 93 ;CHECK: vrev32.16 127 ;CHECK: vrev32.16 155 ; CHECK: vrev32.16
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/external/boringssl/ios-arm/crypto/fipsmodule/ |
D | sha1-armv4-large.S | 535 vrev32.8 q0,q0 @ yes, even on 536 vrev32.8 q1,q1 @ big-endian... 537 vrev32.8 q2,q2 539 vrev32.8 q3,q3 1233 vrev32.8 q0,q0 1254 vrev32.8 q1,q1 1285 vrev32.8 q2,q2 1316 vrev32.8 q3,q3 1395 vrev32.8 q4,q4 1396 vrev32.8 q5,q5 [all …]
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D | bsaes-armv7.S | 1409 vrev32.8 q0,q0 1411 vrev32.8 q4,q4
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/external/boringssl/linux-arm/crypto/fipsmodule/ |
D | sha1-armv4-large.S | 532 vrev32.8 q0,q0 @ yes, even on 533 vrev32.8 q1,q1 @ big-endian... 534 vrev32.8 q2,q2 536 vrev32.8 q3,q3 1230 vrev32.8 q0,q0 1251 vrev32.8 q1,q1 1282 vrev32.8 q2,q2 1313 vrev32.8 q3,q3 1390 vrev32.8 q4,q4 1391 vrev32.8 q5,q5 [all …]
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D | bsaes-armv7.S | 1400 vrev32.8 q0,q0 1402 vrev32.8 q4,q4
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/external/boringssl/ios-arm/crypto/chacha/ |
D | chacha-armv4.S | 893 vrev32.16 q3,q3 895 vrev32.16 q7,q7 897 vrev32.16 q11,q11 1001 vrev32.16 q3,q3 1003 vrev32.16 q7,q7 1005 vrev32.16 q11,q11
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/external/boringssl/linux-arm/crypto/chacha/ |
D | chacha-armv4.S | 890 vrev32.16 q3,q3 892 vrev32.16 q7,q7 894 vrev32.16 q11,q11 998 vrev32.16 q3,q3 1000 vrev32.16 q7,q7 1002 vrev32.16 q11,q11
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