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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/
Dvrint.ll3 declare float @llvm.arm.neon.vrintn.f32(float) nounwind readnone
6 ; CHECK: vrintn.f32
9 %tmp2 = call float @llvm.arm.neon.vrintn.f32(float %tmp1)
/external/llvm/test/MC/ARM/
Dneon-v8.s48 vrintn.f32 d3, d0
49 @ CHECK: vrintn.f32 d3, d0 @ encoding: [0x00,0x34,0xba,0xf3]
50 vrintn.f32 q1, q4
51 @ CHECK: vrintn.f32 q1, q4 @ encoding: [0x48,0x24,0xba,0xf3]
74 vrintn.f32.f32 d3, d0
75 @ CHECK: vrintn.f32 d3, d0 @ encoding: [0x00,0x34,0xba,0xf3]
Dthumb-neon-v8.s48 vrintn.f32 d3, d0
49 @ CHECK: vrintn.f32 d3, d0 @ encoding: [0xba,0xff,0x00,0x34]
50 vrintn.f32 q1, q4
51 @ CHECK: vrintn.f32 q1, q4 @ encoding: [0xba,0xff,0x48,0x24]
74 vrintn.f32.f32 d3, d0
75 @ CHECK: vrintn.f32 d3, d0 @ encoding: [0xba,0xff,0x00,0x34]
Ddirective-arch_extension-simd.s95 vrintn.f32 s0, s0
97 vrintn.f64 d0, d0
99 vrintn.f32.f32 s0, s0
101 vrintn.f64.f64 d0, d0
203 vrintn.f32 s0, s0
205 vrintn.f64 d0, d0
207 vrintn.f32.f32 s0, s0
209 vrintn.f64.f64 d0, d0
Ddirective-arch_extension-fp.s123 vrintn.f32 s0, s0
125 vrintn.f64 d0, d0
127 vrintn.f32.f32 s0, s0
129 vrintn.f64.f64 d0, d0
259 vrintn.f32 s0, s0
261 vrintn.f64 d0, d0
263 vrintn.f32.f32 s0, s0
265 vrintn.f64.f64 d0, d0
Dfp-armv8.s113 vrintn.f64 d3, d4
114 @ CHECK: vrintn.f64 d3, d4 @ encoding: [0x44,0x3b,0xb9,0xfe]
115 vrintn.f32 s12, s1
116 @ CHECK: vrintn.f32 s12, s1 @ encoding: [0x60,0x6a,0xb9,0xfe]
Dthumb-fp-armv8.s119 vrintn.f64 d3, d4
120 @ CHECK: vrintn.f64 d3, d4 @ encoding: [0xb9,0xfe,0x44,0x3b]
121 vrintn.f32 s12, s1
122 @ CHECK: vrintn.f32 s12, s1 @ encoding: [0xb9,0xfe,0x60,0x6a]
Dfullfp16-neon.s378 vrintn.f16.f16 d0, d1
379 vrintn.f16.f16 q0, q1
380 @ ARM: vrintn.f16 d0, d1 @ encoding: [0x01,0x04,0xb6,0xf3]
381 @ ARM: vrintn.f16 q0, q1 @ encoding: [0x42,0x04,0xb6,0xf3]
382 @ THUMB: vrintn.f16 d0, d1 @ encoding: [0xb6,0xff,0x01,0x04]
383 @ THUMB: vrintn.f16 q0, q1 @ encoding: [0xb6,0xff,0x42,0x04]
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/ARM/
Dthumb-neon-v8.s48 vrintn.f32 d3, d0
49 @ CHECK: vrintn.f32 d3, d0 @ encoding: [0xba,0xff,0x00,0x34]
50 vrintn.f32 q1, q4
51 @ CHECK: vrintn.f32 q1, q4 @ encoding: [0xba,0xff,0x48,0x24]
74 vrintn.f32.f32 d3, d0
75 @ CHECK: vrintn.f32 d3, d0 @ encoding: [0xba,0xff,0x00,0x34]
Dneon-v8.s48 vrintn.f32 d3, d0
49 @ CHECK: vrintn.f32 d3, d0 @ encoding: [0x00,0x34,0xba,0xf3]
50 vrintn.f32 q1, q4
51 @ CHECK: vrintn.f32 q1, q4 @ encoding: [0x48,0x24,0xba,0xf3]
74 vrintn.f32.f32 d3, d0
75 @ CHECK: vrintn.f32 d3, d0 @ encoding: [0x00,0x34,0xba,0xf3]
Ddirective-arch_extension-simd.s95 vrintn.f32 s0, s0
97 vrintn.f64 d0, d0
99 vrintn.f32.f32 s0, s0
101 vrintn.f64.f64 d0, d0
203 vrintn.f32 s0, s0
205 vrintn.f64 d0, d0
207 vrintn.f32.f32 s0, s0
209 vrintn.f64.f64 d0, d0
Ddirective-arch_extension-fp.s123 vrintn.f32 s0, s0
125 vrintn.f64 d0, d0
127 vrintn.f32.f32 s0, s0
129 vrintn.f64.f64 d0, d0
259 vrintn.f32 s0, s0
261 vrintn.f64 d0, d0
263 vrintn.f32.f32 s0, s0
265 vrintn.f64.f64 d0, d0
Dthumb-fp-armv8.s119 vrintn.f64 d3, d4
120 @ CHECK: vrintn.f64 d3, d4 @ encoding: [0xb9,0xfe,0x44,0x3b]
121 vrintn.f32 s12, s1
122 @ CHECK: vrintn.f32 s12, s1 @ encoding: [0xb9,0xfe,0x60,0x6a]
Dfp-armv8.s113 vrintn.f64 d3, d4
114 @ CHECK: vrintn.f64 d3, d4 @ encoding: [0x44,0x3b,0xb9,0xfe]
115 vrintn.f32 s12, s1
116 @ CHECK: vrintn.f32 s12, s1 @ encoding: [0x60,0x6a,0xb9,0xfe]
Dfullfp16-neon.s378 vrintn.f16.f16 d0, d1
379 vrintn.f16.f16 q0, q1
380 @ ARM: vrintn.f16 d0, d1 @ encoding: [0x01,0x04,0xb6,0xf3]
381 @ ARM: vrintn.f16 q0, q1 @ encoding: [0x42,0x04,0xb6,0xf3]
382 @ THUMB: vrintn.f16 d0, d1 @ encoding: [0xb6,0xff,0x01,0x04]
383 @ THUMB: vrintn.f16 q0, q1 @ encoding: [0xb6,0xff,0x42,0x04]
/external/capstone/suite/MC/ARM/
Dthumb-neon-v8.s.cs22 0xba,0xff,0x00,0x34 = vrintn.f32 d3, d0
23 0xba,0xff,0x48,0x24 = vrintn.f32 q1, q4
34 0xba,0xff,0x00,0x34 = vrintn.f32 d3, d0
Dneon-v8.s.cs22 0x00,0x34,0xba,0xf3 = vrintn.f32 d3, d0
23 0x48,0x24,0xba,0xf3 = vrintn.f32 q1, q4
34 0x00,0x34,0xba,0xf3 = vrintn.f32 d3, d0
Dthumb-fp-armv8.s.cs46 0xb9,0xfe,0x44,0x3b = vrintn.f64 d3, d4
47 0xb9,0xfe,0x60,0x6a = vrintn.f32 s12, s1
Dfp-armv8.s.cs46 0x44,0x3b,0xb9,0xfe = vrintn.f64 d3, d4
47 0x60,0x6a,0xb9,0xfe = vrintn.f32 s12, s1
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/ARM/
Dneon-v8.txt49 # CHECK: vrintn.f32 d3, d0
51 # CHECK: vrintn.f32 q1, q4
Dthumb-neon-v8.txt49 # CHECK: vrintn.f32 d3, d0
51 # CHECK: vrintn.f32 q1, q4
Dthumb-fp-armv8.txt148 # CHECK: vrintn.f64 d3, d4
151 # CHECK: vrintn.f32 s12, s1
Dfp-armv8.txt140 # CHECK: vrintn.f64 d3, d4
143 # CHECK: vrintn.f32 s12, s1
/external/llvm/test/MC/Disassembler/ARM/
Dneon-v8.txt49 # CHECK: vrintn.f32 d3, d0
51 # CHECK: vrintn.f32 q1, q4
Dthumb-neon-v8.txt49 # CHECK: vrintn.f32 d3, d0
51 # CHECK: vrintn.f32 q1, q4

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