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Searched refs:vs_output_param_offset (Results 1 – 8 of 8) sorted by relevance

/external/mesa3d/src/amd/common/
Dac_llvm_build.c1611 static bool ac_eliminate_const_output(uint8_t *vs_output_param_offset, in ac_eliminate_const_output() argument
1647 if (vs_output_param_offset[i] == exp->offset) { in ac_eliminate_const_output()
1648 vs_output_param_offset[i] = in ac_eliminate_const_output()
1656 static bool ac_eliminate_duplicated_output(uint8_t *vs_output_param_offset, in ac_eliminate_duplicated_output() argument
1722 if (vs_output_param_offset[i] == exp->offset) { in ac_eliminate_duplicated_output()
1723 vs_output_param_offset[i] = match->offset; in ac_eliminate_duplicated_output()
1732 uint8_t *vs_output_param_offset, in ac_optimize_vs_outputs() argument
1800 if (ac_eliminate_const_output(vs_output_param_offset, in ac_optimize_vs_outputs()
1802 ac_eliminate_duplicated_output(vs_output_param_offset, in ac_optimize_vs_outputs()
1822 memcpy(old_offset, vs_output_param_offset, in ac_optimize_vs_outputs()
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Dac_nir_to_llvm.h140 uint8_t vs_output_param_offset[VARYING_SLOT_MAX]; member
Dac_llvm_build.h332 uint8_t *vs_output_param_offset,
Dac_nir_to_llvm.c5970 memset(outinfo->vs_output_param_offset, AC_EXP_PARAM_UNDEFINED, in handle_vs_outputs_post()
5971 sizeof(outinfo->vs_output_param_offset)); in handle_vs_outputs_post()
6095 outinfo->vs_output_param_offset[VARYING_SLOT_LAYER] = param_count; in handle_vs_outputs_post()
6099 outinfo->vs_output_param_offset[VARYING_SLOT_PRIMITIVE_ID] = param_count; in handle_vs_outputs_post()
6104 outinfo->vs_output_param_offset[i] = param_count; in handle_vs_outputs_post()
6123 outinfo->vs_output_param_offset[VARYING_SLOT_PRIMITIVE_ID] = param_count; in handle_vs_outputs_post()
6668 outinfo->vs_output_param_offset, in ac_nir_eliminate_const_vs_outputs()
/external/mesa3d/src/gallium/drivers/radeonsi/
Dsi_shader.h570 ubyte vs_output_param_offset[SI_MAX_VS_OUTPUTS]; member
Dsi_shader.c2883 assert(i < ARRAY_SIZE(shader->info.vs_output_param_offset)); in si_build_param_exports()
2884 shader->info.vs_output_param_offset[i] = param_count++; in si_build_param_exports()
5936 shader->info.vs_output_param_offset, in si_optimize_vs_outputs()
6701 memset(shader->info.vs_output_param_offset, AC_EXP_PARAM_UNDEFINED, in si_compile_tgsi_shader()
6702 sizeof(shader->info.vs_output_param_offset)); in si_compile_tgsi_shader()
7987 memcpy(shader->info.vs_output_param_offset, in si_shader_create()
7988 mainp->info.vs_output_param_offset, in si_shader_create()
7989 sizeof(mainp->info.vs_output_param_offset)); in si_shader_create()
Dsi_state_shaders.c1862 unsigned offset = shader->info.vs_output_param_offset[i]; in si_init_shader_selector_async()
2558 offset = vs->info.vs_output_param_offset[j]; in si_get_ps_input_cntl()
2583 ps_input_cntl |= S_028644_OFFSET(vs->info.vs_output_param_offset[vsinfo->num_outputs]); in si_get_ps_input_cntl()
/external/mesa3d/src/amd/vulkan/
Dradv_pipeline.c1643 unsigned vs_offset = outinfo->vs_output_param_offset[VARYING_SLOT_PRIMITIVE_ID]; in calculate_ps_inputs()
1651 unsigned vs_offset = outinfo->vs_output_param_offset[VARYING_SLOT_LAYER]; in calculate_ps_inputs()
1672 vs_offset = outinfo->vs_output_param_offset[VARYING_SLOT_VAR0 + i]; in calculate_ps_inputs()