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Searched refs:vshll (Results 1 – 25 of 33) sorted by relevance

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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/ARM/
Dneont2-shift-encoding.s69 @ CHECK: vshll.s8 q8, d16, #7 @ encoding: [0xcf,0xef,0x30,0x0a]
70 vshll.s8 q8, d16, #7
71 @ CHECK: vshll.s16 q8, d16, #15 @ encoding: [0xdf,0xef,0x30,0x0a]
72 vshll.s16 q8, d16, #15
73 @ CHECK: vshll.s32 q8, d16, #31 @ encoding: [0xff,0xef,0x30,0x0a]
74 vshll.s32 q8, d16, #31
75 @ CHECK: vshll.u8 q8, d16, #7 @ encoding: [0xcf,0xff,0x30,0x0a]
76 vshll.u8 q8, d16, #7
77 @ CHECK: vshll.u16 q8, d16, #15 @ encoding: [0xdf,0xff,0x30,0x0a]
78 vshll.u16 q8, d16, #15
[all …]
Dneon-shift-encoding.s253 vshll.s8 q8, d16, #7
254 vshll.s16 q8, d16, #15
255 vshll.s32 q8, d16, #31
256 vshll.u8 q8, d16, #7
257 vshll.u16 q8, d16, #15
258 vshll.u32 q8, d16, #31
259 vshll.i8 q8, d16, #8
260 vshll.i16 q8, d16, #16
261 vshll.i32 q8, d16, #32
263 @ CHECK: vshll.s8 q8, d16, #7 @ encoding: [0x30,0x0a,0xcf,0xf2]
[all …]
/external/llvm/test/MC/ARM/
Dneont2-shift-encoding.s69 @ CHECK: vshll.s8 q8, d16, #7 @ encoding: [0xcf,0xef,0x30,0x0a]
70 vshll.s8 q8, d16, #7
71 @ CHECK: vshll.s16 q8, d16, #15 @ encoding: [0xdf,0xef,0x30,0x0a]
72 vshll.s16 q8, d16, #15
73 @ CHECK: vshll.s32 q8, d16, #31 @ encoding: [0xff,0xef,0x30,0x0a]
74 vshll.s32 q8, d16, #31
75 @ CHECK: vshll.u8 q8, d16, #7 @ encoding: [0xcf,0xff,0x30,0x0a]
76 vshll.u8 q8, d16, #7
77 @ CHECK: vshll.u16 q8, d16, #15 @ encoding: [0xdf,0xff,0x30,0x0a]
78 vshll.u16 q8, d16, #15
[all …]
Dneon-shift-encoding.s253 vshll.s8 q8, d16, #7
254 vshll.s16 q8, d16, #15
255 vshll.s32 q8, d16, #31
256 vshll.u8 q8, d16, #7
257 vshll.u16 q8, d16, #15
258 vshll.u32 q8, d16, #31
259 vshll.i8 q8, d16, #8
260 vshll.i16 q8, d16, #16
261 vshll.i32 q8, d16, #32
263 @ CHECK: vshll.s8 q8, d16, #7 @ encoding: [0x30,0x0a,0xcf,0xf2]
[all …]
/external/swiftshader/third_party/LLVM/test/MC/ARM/
Dneont2-shift-encoding.s69 @ CHECK: vshll.s8 q8, d16, #7 @ encoding: [0xcf,0xef,0x30,0x0a]
70 vshll.s8 q8, d16, #7
71 @ CHECK: vshll.s16 q8, d16, #15 @ encoding: [0xdf,0xef,0x30,0x0a]
72 vshll.s16 q8, d16, #15
73 @ CHECK: vshll.s32 q8, d16, #31 @ encoding: [0xff,0xef,0x30,0x0a]
74 vshll.s32 q8, d16, #31
75 @ CHECK: vshll.u8 q8, d16, #7 @ encoding: [0xcf,0xff,0x30,0x0a]
76 vshll.u8 q8, d16, #7
77 @ CHECK: vshll.u16 q8, d16, #15 @ encoding: [0xdf,0xff,0x30,0x0a]
78 vshll.u16 q8, d16, #15
[all …]
Dneon-shift-encoding.s132 @ CHECK: vshll.s8 q8, d16, #7 @ encoding: [0x30,0x0a,0xcf,0xf2]
133 vshll.s8 q8, d16, #7
134 @ CHECK: vshll.s16 q8, d16, #15 @ encoding: [0x30,0x0a,0xdf,0xf2]
135 vshll.s16 q8, d16, #15
136 @ CHECK: vshll.s32 q8, d16, #31 @ encoding: [0x30,0x0a,0xff,0xf2]
137 vshll.s32 q8, d16, #31
138 @ CHECK: vshll.u8 q8, d16, #7 @ encoding: [0x30,0x0a,0xcf,0xf3]
139 vshll.u8 q8, d16, #7
140 @ CHECK: vshll.u16 q8, d16, #15 @ encoding: [0x30,0x0a,0xdf,0xf3]
141 vshll.u16 q8, d16, #15
[all …]
/external/capstone/suite/MC/ARM/
Dneont2-shift-encoding.s.cs34 0xcf,0xef,0x30,0x0a = vshll.s8 q8, d16, #7
35 0xdf,0xef,0x30,0x0a = vshll.s16 q8, d16, #15
36 0xff,0xef,0x30,0x0a = vshll.s32 q8, d16, #31
37 0xcf,0xff,0x30,0x0a = vshll.u8 q8, d16, #7
38 0xdf,0xff,0x30,0x0a = vshll.u16 q8, d16, #15
39 0xff,0xff,0x30,0x0a = vshll.u32 q8, d16, #31
40 0xf2,0xff,0x20,0x03 = vshll.i8 q8, d16, #8
41 0xf6,0xff,0x20,0x03 = vshll.i16 q8, d16, #16
42 0xfa,0xff,0x20,0x03 = vshll.i32 q8, d16, #32
Dneon-shift-encoding.s.cs114 0x30,0x0a,0xcf,0xf2 = vshll.s8 q8, d16, #7
115 0x30,0x0a,0xdf,0xf2 = vshll.s16 q8, d16, #15
116 0x30,0x0a,0xff,0xf2 = vshll.s32 q8, d16, #31
117 0x30,0x0a,0xcf,0xf3 = vshll.u8 q8, d16, #7
118 0x30,0x0a,0xdf,0xf3 = vshll.u16 q8, d16, #15
119 0x30,0x0a,0xff,0xf3 = vshll.u32 q8, d16, #31
120 0x20,0x03,0xf2,0xf3 = vshll.i8 q8, d16, #8
121 0x20,0x03,0xf6,0xf3 = vshll.i16 q8, d16, #16
122 0x20,0x03,0xfa,0xf3 = vshll.i32 q8, d16, #32
/external/swiftshader/third_party/LLVM/test/CodeGen/ARM/
Dvshll.ll5 ;CHECK: vshll.s8
13 ;CHECK: vshll.s16
21 ;CHECK: vshll.s32
29 ;CHECK: vshll.u8
37 ;CHECK: vshll.u16
45 ;CHECK: vshll.u32
55 ;CHECK: vshll.i8
63 ;CHECK: vshll.i16
71 ;CHECK: vshll.i32
/external/llvm/test/CodeGen/ARM/
Dvshll.ll5 ;CHECK: vshll.s8
14 ;CHECK: vshll.s16
23 ;CHECK: vshll.s32
32 ;CHECK: vshll.u8
41 ;CHECK: vshll.u16
50 ;CHECK: vshll.u32
61 ;CHECK: vshll.i8
70 ;CHECK: vshll.i16
79 ;CHECK: vshll.i32
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/
Dvshll.ll5 ;CHECK: vshll.s8
14 ;CHECK: vshll.s16
23 ;CHECK: vshll.s32
32 ;CHECK: vshll.u8
41 ;CHECK: vshll.u16
50 ;CHECK: vshll.u32
61 ;CHECK: vshll.i8
70 ;CHECK: vshll.i16
79 ;CHECK: vshll.i32
/external/arm-neon-tests/
Dref_vshll_n.c40 vshll##_n_##T2##W(VECT_VAR(vector, T1, W, N), \ in exec_vshll_n()
/external/libavc/common/arm/
Dih264_deblk_luma_a9.s151 vshll.u8 q13, d9, #1 @
153 vshll.u8 q8, d8, #1 @Q13,Q8 = (p1<<1)
157 vshll.u8 q8, d2, #1 @
158 vshll.u8 q13, d3, #1 @Q13,Q8 = (q1<<1)
/external/boringssl/src/crypto/poly1305/
Dpoly1305_arm_asm.S523 # asm 1: vshll.u32 >r3=reg128#5,<c23=reg128#2%top,#18
524 # asm 2: vshll.u32 >r3=q4,<c23=d3,#18
525 vshll.u32 q4,d3,#18
583 # asm 1: vshll.u32 >r2=reg128#14,<c01=reg128#1%top,#12
584 # asm 2: vshll.u32 >r2=q13,<c01=d1,#12
585 vshll.u32 q13,d1,#12
623 # asm 1: vshll.u32 >r1=reg128#15,<c23=reg128#2%bot,#6
624 # asm 2: vshll.u32 >r1=q14,<c23=d2,#6
625 vshll.u32 q14,d2,#6
1248 # asm 1: vshll.u32 >r3=reg128#6,<c23=reg128#14%top,#18
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/ARM/
Dneon-tests.txt51 # CHECK: vshll.i16 q3, d1, #16
Dneont2.txt1084 # CHECK: vshll.s8 q8, d16, #7
1086 # CHECK: vshll.s16 q8, d16, #15
1088 # CHECK: vshll.s32 q8, d16, #31
1090 # CHECK: vshll.u8 q8, d16, #7
1092 # CHECK: vshll.u16 q8, d16, #15
1094 # CHECK: vshll.u32 q8, d16, #31
1096 # CHECK: vshll.i8 q8, d16, #8
1098 # CHECK: vshll.i16 q8, d16, #16
1100 # CHECK: vshll.i32 q8, d16, #32
Dneon.txt1261 # CHECK: vshll.s8 q8, d16, #7
1263 # CHECK: vshll.s16 q8, d16, #15
1265 # CHECK: vshll.s32 q8, d16, #31
1267 # CHECK: vshll.u8 q8, d16, #7
1269 # CHECK: vshll.u16 q8, d16, #15
1271 # CHECK: vshll.u32 q8, d16, #31
1273 # CHECK: vshll.i8 q8, d16, #8
1275 # CHECK: vshll.i16 q8, d16, #16
1277 # CHECK: vshll.i32 q8, d16, #32
/external/llvm/test/MC/Disassembler/ARM/
Dneon-tests.txt51 # CHECK: vshll.i16 q3, d1, #16
Dneont2.txt1084 # CHECK: vshll.s8 q8, d16, #7
1086 # CHECK: vshll.s16 q8, d16, #15
1088 # CHECK: vshll.s32 q8, d16, #31
1090 # CHECK: vshll.u8 q8, d16, #7
1092 # CHECK: vshll.u16 q8, d16, #15
1094 # CHECK: vshll.u32 q8, d16, #31
1096 # CHECK: vshll.i8 q8, d16, #8
1098 # CHECK: vshll.i16 q8, d16, #16
1100 # CHECK: vshll.i32 q8, d16, #32
Dneon.txt1261 # CHECK: vshll.s8 q8, d16, #7
1263 # CHECK: vshll.s16 q8, d16, #15
1265 # CHECK: vshll.s32 q8, d16, #31
1267 # CHECK: vshll.u8 q8, d16, #7
1269 # CHECK: vshll.u16 q8, d16, #15
1271 # CHECK: vshll.u32 q8, d16, #31
1273 # CHECK: vshll.i8 q8, d16, #8
1275 # CHECK: vshll.i16 q8, d16, #16
1277 # CHECK: vshll.i32 q8, d16, #32
/external/swiftshader/third_party/LLVM/test/MC/Disassembler/ARM/
Dneon-tests.txt51 # CHECK: vshll.i16 q3, d1, #16
Dneont2.txt1084 # CHECK: vshll.s8 q8, d16, #7
1086 # CHECK: vshll.s16 q8, d16, #15
1088 # CHECK: vshll.s32 q8, d16, #31
1090 # CHECK: vshll.u8 q8, d16, #7
1092 # CHECK: vshll.u16 q8, d16, #15
1094 # CHECK: vshll.u32 q8, d16, #31
1096 # CHECK: vshll.i8 q8, d16, #8
1098 # CHECK: vshll.i16 q8, d16, #16
1100 # CHECK: vshll.i32 q8, d16, #32
Dneon.txt1261 # CHECK: vshll.s8 q8, d16, #7
1263 # CHECK: vshll.s16 q8, d16, #15
1265 # CHECK: vshll.s32 q8, d16, #31
1267 # CHECK: vshll.u8 q8, d16, #7
1269 # CHECK: vshll.u16 q8, d16, #15
1271 # CHECK: vshll.u32 q8, d16, #31
1273 # CHECK: vshll.i8 q8, d16, #8
1275 # CHECK: vshll.i16 q8, d16, #16
1277 # CHECK: vshll.i32 q8, d16, #32
/external/vixl/src/aarch32/
Ddisasm-aarch32.cc6518 void Disassembler::vshll(Condition cond, in vshll() function in vixl::aarch32::Disassembler
27626 vshll(CurrentCond(), in DecodeT32()
31907 vshll(CurrentCond(), in DecodeT32()
32050 vshll(CurrentCond(), in DecodeT32()
32193 vshll(CurrentCond(), in DecodeT32()
32336 vshll(CurrentCond(), in DecodeT32()
32535 vshll(CurrentCond(), in DecodeT32()
32581 vshll(CurrentCond(), in DecodeT32()
32627 vshll(CurrentCond(), in DecodeT32()
32673 vshll(CurrentCond(), in DecodeT32()
[all …]
/external/libjpeg-turbo/simd/arm/
Djsimd_neon.S584 vshll.s16 q3, ROW0L, #13
601 vshll.s16 q5, ROW0L, #13
621 vshll.s16 q3, ROW4L, #13
638 vshll.s16 q5, ROW4L, #13
1141 vshll.s16 q14, \x4, #15
1224 vshll.s16 q14, d4, #15
1225 vshll.s16 q15, d5, #15

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