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Searched refs:vt_begin (Results 1 – 11 of 11) sorted by relevance

/external/llvm/lib/Target/Mips/
DMipsOptimizePICCall.cpp120 assert(RC->vt_end() - RC->vt_begin() == 1); in getRegTy()
121 return *RC->vt_begin(); in getRegTy()
/external/swiftshader/third_party/LLVM/include/llvm/Target/
DTargetRegisterInfo.h118 vt_iterator vt_begin() const { in vt_begin() function
/external/llvm/include/llvm/Target/
DTargetRegisterInfo.h132 vt_iterator vt_begin() const { in vt_begin() function
/external/llvm/lib/CodeGen/GlobalISel/
DRegisterBankInfo.cpp105 make_range(CurRC.vt_begin(), CurRC.vt_end())) in addRegBankCoverage()
/external/swiftshader/third_party/LLVM/lib/CodeGen/
DMachineLICM.cpp672 EVT VT = *RC->vt_begin(); in getRegisterClassIDAndCost()
/external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/
DSelectionDAGBuilder.cpp5739 EVT RegVT = *PhysReg.second->vt_begin(); in GetRegistersForValue()
5768 ValueVT = *RC->vt_begin(); in GetRegistersForValue()
5773 RegVT = *RC->vt_begin(); in GetRegistersForValue()
5801 RegVT = *RC->vt_begin(); in GetRegistersForValue()
DTargetLowering.cpp704 for (TargetRegisterClass::vt_iterator I = RC->vt_begin(), E = RC->vt_end(); in isLegalRC()
/external/llvm/lib/CodeGen/
DTargetLoweringBase.cpp1165 for (TargetRegisterClass::vt_iterator I = RC->vt_begin(), E = RC->vt_end(); in isLegalRC()
/external/swiftshader/third_party/LLVM/lib/Target/X86/
DX86InstrInfo.cpp3043 EVT VT = *RC->vt_begin(); in unfoldMemoryOperand()
3069 VTs.push_back(*DstRC->vt_begin()); in unfoldMemoryOperand()
/external/llvm/lib/CodeGen/SelectionDAG/
DSelectionDAGBuilder.cpp6486 MVT RegVT = *PhysReg.second->vt_begin(); in GetRegistersForValue()
6514 ValueVT = *RC->vt_begin(); in GetRegistersForValue()
6519 RegVT = *RC->vt_begin(); in GetRegistersForValue()
6545 RegVT = *RC->vt_begin(); in GetRegistersForValue()
/external/llvm/lib/Target/X86/
DX86InstrInfo.cpp6520 EVT VT = *RC->vt_begin(); in unfoldMemoryOperand()
6548 VTs.push_back(*DstRC->vt_begin()); in unfoldMemoryOperand()