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Searched refs:vu_short (Results 1 – 10 of 10) sorted by relevance

/external/u-boot/drivers/net/
Dax88796.h27 #define AX88796L_CR (*(vu_short *)(AX88796L_REG_CR))
28 #define AX88796L_MEMR (*(vu_short *)(AX88796L_REG_MEMR))
52 *( (vu_short *) ((_b_) + ((_o_) * 2) + ISA_OFFSET))
54 *((vu_short *)((_b_) + ((_o_) * 2) + ISA_OFFSET)) = (_d_)
55 #define DP_IN_DATA(_b_, _d_) (_d_) = *( (vu_short *) ((_b_) + ISA_OFFSET))
56 #define DP_OUT_DATA(_b_, _d_) *( (vu_short *) ((_b_)+ISA_OFFSET)) = (_d_)
60 #define DP_IN(_b_, _o_, _d_) (_d_) = *( (vu_short *)((_b_)+(_o_ )+ISA_OFFSET))
61 #define DP_OUT(_b_, _o_, _d_) *((vu_short *)((_b_)+(_o_)+ISA_OFFSET)) = (_d_)
62 #define DP_IN_DATA(_b_, _d_) (_d_) = *( (vu_short *) ((_b_)+ISA_OFFSET))
63 #define DP_OUT_DATA(_b_, _d_) *( (vu_short *) ((_b_)+ISA_OFFSET)) = (_d_)
Dnatsemi.c255 return le16_to_cpu(*(vu_short *) (addr + dev->iobase)); in INW()
267 *(vu_short *) ((addr + dev->iobase)) = cpu_to_le16(command); in OUTW()
Dns8382x.c276 return le16_to_cpu(*(vu_short *) (addr + dev->iobase)); in INW()
288 *(vu_short *) ((addr + dev->iobase)) = cpu_to_le16(command); in OUTW()
/external/u-boot/arch/m68k/include/asm/
Dm5282.h208 #define MCFGPIO_PEPAR (*(vu_short *)(CONFIG_SYS_MBAR+0x100052))
211 #define MCFGPIO_PASPAR (*(vu_short *)(CONFIG_SYS_MBAR+0x100056))
363 #define MCFCCM_CCR (*(vu_short *)(CONFIG_SYS_MBAR+0x00110004))
364 #define MCFCCM_RCON (*(vu_short *)(CONFIG_SYS_MBAR+0x00110008))
365 #define MCFCCM_CIR (*(vu_short *)(CONFIG_SYS_MBAR+0x0011000A))
380 #define MCFCLOCK_SYNCR (*(vu_short *)(CONFIG_SYS_MBAR+0x120000))
387 #define MCFSDRAMC_DCR (*(vu_short *)(CONFIG_SYS_MBAR+0x00000040))
421 #define MCFWTM_WCR (*(vu_short *)(CONFIG_SYS_MBAR+0x00140000))
422 #define MCFWTM_WMR (*(vu_short *)(CONFIG_SYS_MBAR+0x00140002))
423 #define MCFWTM_WCNTR (*(vu_short *)(CONFIG_SYS_MBAR+0x00140004))
[all …]
/external/u-boot/board/renesas/ap325rxa/
Dcpld-ap325rxa.c30 #define SCSMR (vu_short *)(SCIF_BASE + 0x00)
32 #define SCSCR (vu_short *)(SCIF_BASE + 0x08)
34 #define SC_SR (vu_short *)(SCIF_BASE + 0x10)
35 #define SCFCR (vu_short *)(SCIF_BASE + 0x18)
53 #define CPLD_PFC_ADR ((vu_short *)0xA4050112)
64 #define HIZCRB ((vu_short *)0xA405015A)
/external/u-boot/drivers/pci/
Dpci_sh7780.c30 #define p4_inw(addr) (*(vu_short *)addr)
31 #define p4_outw(data, addr) (*(vu_short *)addr) = (data)
Dpci_sh7751.c16 #define SH7751_BCR2 (vu_short *)0xFF800004
21 #define SH7751_BCR3 (vu_short *)0xFF800050
/external/u-boot/drivers/video/
Dbus_vcxk.c12 vu_short *vcxk_bws_word = ((vu_short *)(CONFIG_SYS_VCXK_BASE));
188 vu_short dataptr; in vcxk_setpixel()
/external/u-boot/board/renesas/sh7763rdp/
Dsh7763rdp.c36 vu_short dat; in board_init()
/external/u-boot/include/
Dcommon.h14 typedef volatile unsigned short vu_short; typedef