/external/mesa3d/src/gallium/drivers/r600/sb/ |
D | sb_bc_decoder.cpp | 59 CF_WORD1_EG w1(dw1); in decode_cf() local 61 bc.barrier = w1.get_BARRIER(); in decode_cf() 62 bc.cf_const = w1.get_CF_CONST(); in decode_cf() 63 bc.cond = w1.get_COND(); in decode_cf() 64 bc.count = w1.get_COUNT(); in decode_cf() 65 bc.end_of_program = w1.get_END_OF_PROGRAM(); in decode_cf() 66 bc.pop_count = w1.get_POP_COUNT(); in decode_cf() 67 bc.valid_pixel_mode = w1.get_VALID_PIXEL_MODE(); in decode_cf() 68 bc.whole_quad_mode = w1.get_WHOLE_QUAD_MODE(); in decode_cf() 71 CF_WORD1_CM w1(dw1); in decode_cf() local [all …]
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/external/llvm/test/MC/AArch64/ |
D | arm64-logical-encoding.s | 10 and w1, w2, #15 15 ands w1, w2, #15 20 ; CHECK: and w1, w2, #0xf ; encoding: [0x41,0x0c,0x00,0x12] 25 ; CHECK: ands w1, w2, #0xf ; encoding: [0x41,0x0c,0x00,0x72] 28 eor w1, w2, #0x4000 31 ; CHECK: eor w1, w2, #0x4000 ; encoding: [0x41,0x00,0x12,0x52] 34 orr w1, w2, #0x4000 37 ; CHECK: orr w1, w2, #0x4000 ; encoding: [0x41,0x00,0x12,0x32] 50 and w1, w2, w3 52 and w1, w2, w3, lsl #2 [all …]
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D | armv8.1a-atomic.s | 6 casb w0, w1, [x2] 7 casab w0, w1, [x2] 8 caslb w0, w1, [x2] 9 casalb w0, w1, [x2] 16 casb w0, w1, [w2] 26 cash w0, w1, [x2] 27 casah w0, w1, [x2] 28 caslh w0, w1, [x2] 29 casalh w0, w1, [x2] 37 cas w0, w1, [x2] [all …]
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D | arm64-arithmetic-encoding.s | 8 adc w1, w2, w3 13 ; CHECK: adc w1, w2, w3 ; encoding: [0x41,0x00,0x03,0x1a] 18 sbc w1, w2, w3 20 sbcs w1, w2, w3 23 ; CHECK: sbc w1, w2, w3 ; encoding: [0x41,0x00,0x03,0x5a] 25 ; CHECK: sbcs w1, w2, w3 ; encoding: [0x41,0x00,0x03,0x7a] 170 add w1, w2, w3, uxtb 171 add w1, w2, w3, uxth 172 add w1, w2, w3, uxtw 173 add w1, w2, w3, uxtx [all …]
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D | arm64-fp-encoding.s | 254 fcvtas w1, d2 256 fcvtas w1, s2 258 fcvtas w1, h2 261 ; CHECK: fcvtas w1, d2 ; encoding: [0x41,0x00,0x64,0x1e] 263 ; CHECK: fcvtas w1, s2 ; encoding: [0x41,0x00,0x24,0x1e] 265 ; FP16: fcvtas w1, h2 ; encoding: [0x41,0x00,0xe4,0x1e] 267 ; NO-FP16-NEXT: fcvtas w1, h2 272 fcvtau w1, h2 273 fcvtau w1, s2 274 fcvtau w1, d2 [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AArch64/ |
D | arm64-logical-encoding.s | 10 and w1, w2, #15 15 ands w1, w2, #15 20 ; CHECK: and w1, w2, #0xf ; encoding: [0x41,0x0c,0x00,0x12] 25 ; CHECK: ands w1, w2, #0xf ; encoding: [0x41,0x0c,0x00,0x72] 28 eor w1, w2, #0x4000 31 ; CHECK: eor w1, w2, #0x4000 ; encoding: [0x41,0x00,0x12,0x52] 34 orr w1, w2, #0x4000 37 ; CHECK: orr w1, w2, #0x4000 ; encoding: [0x41,0x00,0x12,0x32] 50 and w1, w2, w3 52 and w1, w2, w3, lsl #2 [all …]
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D | armv8.1a-atomic.s | 6 casb w0, w1, [x2] 7 casab w0, w1, [x2] 8 caslb w0, w1, [x2] 9 casalb w0, w1, [x2] 16 casb w0, w1, [w2] 26 cash w0, w1, [x2] 27 casah w0, w1, [x2] 28 caslh w0, w1, [x2] 29 casalh w0, w1, [x2] 37 cas w0, w1, [x2] [all …]
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D | arm64-arithmetic-encoding.s | 8 adc w1, w2, w3 13 ; CHECK: adc w1, w2, w3 ; encoding: [0x41,0x00,0x03,0x1a] 18 sbc w1, w2, w3 20 sbcs w1, w2, w3 23 ; CHECK: sbc w1, w2, w3 ; encoding: [0x41,0x00,0x03,0x5a] 25 ; CHECK: sbcs w1, w2, w3 ; encoding: [0x41,0x00,0x03,0x7a] 170 add w1, w2, w3, uxtb 171 add w1, w2, w3, uxth 172 add w1, w2, w3, uxtw 173 add w1, w2, w3, uxtx [all …]
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D | arm64-fp-encoding.s | 254 fcvtas w1, d2 256 fcvtas w1, s2 258 fcvtas w1, h2 261 ; CHECK: fcvtas w1, d2 ; encoding: [0x41,0x00,0x64,0x1e] 263 ; CHECK: fcvtas w1, s2 ; encoding: [0x41,0x00,0x24,0x1e] 265 ; FP16: fcvtas w1, h2 ; encoding: [0x41,0x00,0xe4,0x1e] 267 ; NO-FP16-NEXT: fcvtas w1, h2 272 fcvtau w1, h2 273 fcvtau w1, s2 274 fcvtau w1, d2 [all …]
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D | label-arithmetic-elf.s | 8 adds w0, w1, #(end - start) 10 add w0, w1, #(end - start) 14 sub w0, w1, #(end - start) 25 add w0, w1, #(end - start), lsl #12 30 add w0, w1, #((end - start) >> 2) 35 add w0, w1, #(end - start + 12) 40 add w0, w1, #(forward - end) 56 add w0, w1, #(.Lend - .Lstart) 66 add w0, w1, #(.Lprivate2 - .Lprivate1) 75 add w0, w1, #(foo - .Lprivate2) [all …]
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/external/llvm/test/MC/Mips/msa/ |
D | invalid.s | 8 addvi.b $w1, $w2, -1 # CHECK: :[[@LINE]]:23: error: expected 5-bit unsigned immediate 9 addvi.b $w1, $w2, 32 # CHECK: :[[@LINE]]:23: error: expected 5-bit unsigned immediate 10 addvi.h $w1, $w2, -1 # CHECK: :[[@LINE]]:23: error: expected 5-bit unsigned immediate 11 addvi.h $w1, $w2, 32 # CHECK: :[[@LINE]]:23: error: expected 5-bit unsigned immediate 12 addvi.w $w1, $w2, -1 # CHECK: :[[@LINE]]:23: error: expected 5-bit unsigned immediate 13 addvi.w $w1, $w2, 32 # CHECK: :[[@LINE]]:23: error: expected 5-bit unsigned immediate 14 addvi.d $w1, $w2, -1 # CHECK: :[[@LINE]]:23: error: expected 5-bit unsigned immediate 15 addvi.d $w1, $w2, 32 # CHECK: :[[@LINE]]:23: error: expected 5-bit unsigned immediate 16 andi.b $w1, $w2, -1 # CHECK: :[[@LINE]]:22: error: expected 8-bit unsigned immediate 17 andi.b $w1, $w2, 256 # CHECK: :[[@LINE]]:22: error: expected 8-bit unsigned immediate [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/msa/ |
D | invalid.s | 8 addvi.b $w1, $w2, -1 # CHECK: :[[@LINE]]:23: error: expected 5-bit unsigned immediate 9 addvi.b $w1, $w2, 32 # CHECK: :[[@LINE]]:23: error: expected 5-bit unsigned immediate 10 addvi.h $w1, $w2, -1 # CHECK: :[[@LINE]]:23: error: expected 5-bit unsigned immediate 11 addvi.h $w1, $w2, 32 # CHECK: :[[@LINE]]:23: error: expected 5-bit unsigned immediate 12 addvi.w $w1, $w2, -1 # CHECK: :[[@LINE]]:23: error: expected 5-bit unsigned immediate 13 addvi.w $w1, $w2, 32 # CHECK: :[[@LINE]]:23: error: expected 5-bit unsigned immediate 14 addvi.d $w1, $w2, -1 # CHECK: :[[@LINE]]:23: error: expected 5-bit unsigned immediate 15 addvi.d $w1, $w2, 32 # CHECK: :[[@LINE]]:23: error: expected 5-bit unsigned immediate 16 andi.b $w1, $w2, -1 # CHECK: :[[@LINE]]:22: error: expected 8-bit unsigned immediate 17 andi.b $w1, $w2, 256 # CHECK: :[[@LINE]]:22: error: expected 8-bit unsigned immediate [all …]
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D | test_i5.s | 6 # CHECK: addvi.d $w16, $w1, 21 # encoding: [0x78,0x75,0x0c,0x06] 9 # CHECK: ceqi.w $w12, $w1, -1 # encoding: [0x78,0x5f,0x0b,0x07] 17 # CHECK: clei_u.w $w1, $w1, 2 # encoding: [0x7a,0xc2,0x08,0x47] 25 # CHECK: clti_u.w $w1, $w1, 22 # encoding: [0x79,0xd6,0x08,0x47] 29 # CHECK: maxi_s.w $w1, $w10, -12 # encoding: [0x79,0x54,0x50,0x46] 32 # CHECK: maxi_u.h $w1, $w14, 3 # encoding: [0x79,0xa3,0x70,0x46] 35 # CHECK: mini_s.b $w4, $w1, 1 # encoding: [0x7a,0x01,0x09,0x06] 51 addvi.d $w16, $w1, 21 54 ceqi.w $w12, $w1, -1 62 clei_u.w $w1, $w1, 2 [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AArch64/ |
D | post-ra-machine-sink.mir | 9 # CHECK: liveins: $w1, $w0 16 liveins: $w0, $w1 17 $w1 = SUBSWri $w1, 1, 0, implicit-def $nzcv 23 liveins: $w1, $w19 24 $w0 = ADDWrr $w1, $w19 38 # CHECK: liveins: $w1, $w0 44 liveins: $w0, $w1 45 $w1 = SUBSWri $w1, 1, 0, implicit-def $nzcv 55 liveins: $w1, $w19 56 $w0 = ADDWrr $w1, $w19 [all …]
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D | ldst-opt.mir | 7 liveins: $w1, $x0, $lr 9 STRWui killed $w1, $x0, 0 :: (store 4) 36 # CHECK: STRWui $w1 37 # CHECK: UBFMWri killed $w1 43 liveins: $w1, $x0, $lr 45 STRWui $w1, $x0, 0 :: (store 4) 66 STRWui killed $w1, killed $x0, 1 :: (store 4) 77 liveins: $w1, $x0, $lr 79 STRWui $w1, $x0, 0 :: (store 4) 80 $w2 = COPY $w1 [all …]
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/external/llvm/test/MC/Disassembler/AArch64/ |
D | arm64-logical.txt | 20 # CHECK: and w1, w2, #0xf 25 # CHECK: ands w1, w2, #0xf 33 # CHECK: eor w1, w2, #0x4000 41 # CHECK: orr w1, w2, #0x4000 60 # CHECK: and w1, w2, w3 62 # CHECK: and w1, w2, w3, lsl #2 64 # CHECK: and w1, w2, w3, lsr #2 66 # CHECK: and w1, w2, w3, asr #2 68 # CHECK: and w1, w2, w3, ror #2 82 # CHECK: ands w1, w2, w3 [all …]
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D | arm64-arithmetic.txt | 12 # CHECK: adc w1, w2, w3 22 # CHECK: sbc w1, w2, w3 24 # CHECK: sbcs w1, w2, w3 173 # CHECK: add w1, w2, w3, uxtb 174 # CHECK: add w1, w2, w3, uxth 175 # CHECK: add w1, w2, w3 176 # CHECK: add w1, w2, w3, uxtx 177 # CHECK: add w1, w2, w3, sxtb 178 # CHECK: add w1, w2, w3, sxth 179 # CHECK: add w1, w2, w3, sxtw [all …]
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D | armv8.1a-atomic.txt | 11 # CHECK: casb w0, w1, [x2] 12 # CHECK: casab w0, w1, [x2] 13 # CHECK: caslb w0, w1, [x2] 14 # CHECK: casalb w0, w1, [x2] 15 # CHECK: cash w0, w1, [x2] 16 # CHECK: casah w0, w1, [x2] 17 # CHECK: caslh w0, w1, [x2] 18 # CHECK: casalh w0, w1, [x2] 28 # CHECK: cas w0, w1, [x2] 29 # CHECK: casa w0, w1, [x2] [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/AArch64/ |
D | arm64-logical.txt | 20 # CHECK: and w1, w2, #0xf 25 # CHECK: ands w1, w2, #0xf 33 # CHECK: eor w1, w2, #0x4000 41 # CHECK: orr w1, w2, #0x4000 60 # CHECK: and w1, w2, w3 62 # CHECK: and w1, w2, w3, lsl #2 64 # CHECK: and w1, w2, w3, lsr #2 66 # CHECK: and w1, w2, w3, asr #2 68 # CHECK: and w1, w2, w3, ror #2 82 # CHECK: ands w1, w2, w3 [all …]
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D | arm64-arithmetic.txt | 12 # CHECK: adc w1, w2, w3 22 # CHECK: sbc w1, w2, w3 24 # CHECK: sbcs w1, w2, w3 173 # CHECK: add w1, w2, w3, uxtb 174 # CHECK: add w1, w2, w3, uxth 175 # CHECK: add w1, w2, w3 176 # CHECK: add w1, w2, w3, uxtx 177 # CHECK: add w1, w2, w3, sxtb 178 # CHECK: add w1, w2, w3, sxth 179 # CHECK: add w1, w2, w3, sxtw [all …]
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D | armv8.1a-atomic.txt | 11 # CHECK: casb w0, w1, [x2] 12 # CHECK: casab w0, w1, [x2] 13 # CHECK: caslb w0, w1, [x2] 14 # CHECK: casalb w0, w1, [x2] 15 # CHECK: cash w0, w1, [x2] 16 # CHECK: casah w0, w1, [x2] 17 # CHECK: caslh w0, w1, [x2] 18 # CHECK: casalh w0, w1, [x2] 28 # CHECK: cas w0, w1, [x2] 29 # CHECK: casa w0, w1, [x2] [all …]
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/external/libcxx/test/std/utilities/memory/util.smartptr/util.smartptr.weak/util.smartptr.ownerless/ |
D | owner_less.pass.cpp | 61 const std::weak_ptr<int> w1(p1); in main() local 80 assert(!cs(p2, w1)); in main() 81 assert(cs(p1, w3) || cs(p3, w1)); in main() 82 assert(cs(p3, w1) == cs(p3, w2)); in main() 83 ASSERT_NOEXCEPT(cs(p1, w1)); in main() 84 ASSERT_NOEXCEPT(cs(w1, p1)); in main() 94 assert(!cs(w1, w2)); in main() 95 assert(!cs(w2, w1)); in main() 96 assert(cs(w1, w3) || cs(w3, w1)); in main() 97 assert(cs(w3, w1) == cs(w3, w2)); in main() [all …]
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/external/tcpdump/ |
D | print-tipc.c | 67 uint32_t w1; member 74 #define TIPC_MTYPE(w1) (((w1) >> 29) & 0x07) argument 75 #define TIPC_BROADCAST_ACK(w1) (((w1) >> 0) & 0xFFFF) argument 111 uint32_t w1; member 125 uint32_t w1; member 136 #define TIPC_SEQ_GAP(w1) (((w1) >> 16) & 0x1FFF) argument 147 uint32_t w1; member 155 #define TIPC_NODE_SIG(w1) (((w1) >> 0) & 0xFFFF) argument 161 uint32_t w0, w1, w2; in print_payload() local 180 w1 = EXTRACT_32BITS(&ap->w1); in print_payload() [all …]
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/external/libaom/libaom/aom_dsp/x86/ |
D | lpf_common_sse2.h | 25 __m128i w0, w1, w2, w3, w4, w5, ww0; in highbd_transpose6x6_sse2() local 35 w1 = _mm_unpacklo_epi16(*x2, *x3); // 20 30 21 31 22 32 23 33 in highbd_transpose6x6_sse2() 38 ww0 = _mm_unpacklo_epi32(w0, w1); // 00 10 20 30 01 11 21 31 in highbd_transpose6x6_sse2() 43 ww0 = _mm_unpackhi_epi32(w0, w1); // 02 12 22 32 03 13 23 33 in highbd_transpose6x6_sse2() 64 __m128i w0, w1, ww0, ww1; in highbd_transpose4x8_8x4_low_sse2() local 67 w1 = _mm_unpacklo_epi16(*x2, *x3); // 20 30 21 31 22 32 23 33 in highbd_transpose4x8_8x4_low_sse2() 69 ww0 = _mm_unpacklo_epi32(w0, w1); // 00 10 20 30 01 11 21 31 in highbd_transpose4x8_8x4_low_sse2() 70 ww1 = _mm_unpackhi_epi32(w0, w1); // 02 12 22 32 03 13 23 33 in highbd_transpose4x8_8x4_low_sse2() 82 __m128i w0, w1, ww2, ww3; in highbd_transpose4x8_8x4_high_sse2() local 86 w1 = _mm_unpackhi_epi16(*x2, *x3); // 24 34 25 35 26 36 27 37 in highbd_transpose4x8_8x4_high_sse2() [all …]
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D | jnt_variance_ssse3.c | 54 const uint8_t w1 = (uint8_t)jcp_param->bck_offset; in aom_dist_wtd_comp_avg_pred_ssse3() local 55 const __m128i w = _mm_set_epi8(w1, w0, w1, w0, w1, w0, w1, w0, w1, w0, w1, w0, in aom_dist_wtd_comp_avg_pred_ssse3() 56 w1, w0, w1, w0); in aom_dist_wtd_comp_avg_pred_ssse3() 133 const uint8_t w1 = (uint8_t)jcp_param->bck_offset; in aom_dist_wtd_comp_avg_upsampled_pred_ssse3() local 134 const __m128i w = _mm_set_epi8(w1, w0, w1, w0, w1, w0, w1, w0, w1, w0, w1, w0, in aom_dist_wtd_comp_avg_upsampled_pred_ssse3() 135 w1, w0, w1, w0); in aom_dist_wtd_comp_avg_upsampled_pred_ssse3()
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