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/external/boringssl/ios-aarch64/crypto/fipsmodule/
Dsha256-armv8.S94 eor w28,w21,w22 // magic seed
112 and w28,w28,w19 // (b^c)&=(a^b)
114 eor w28,w28,w21 // Maj(a,b,c)
116 add w27,w27,w28 // h+=Maj(a,b,c)
117 ldr w28,[x30],#4 // *K++, w19 in next round
125 add w26,w26,w28 // h+=K[i]
128 bic w28,w25,w23
130 orr w17,w17,w28 // Ch(e,f,g)
131 eor w28,w27,w20 // a^b, b^c in next round
137 and w19,w19,w28 // (b^c)&=(a^b)
[all …]
Dsha1-armv8.S44 movz w28,#0x7999
46 movk w28,#0x5a82,lsl#16
52 add w24,w24,w28 // warm it up
59 add w23,w23,w28 // future e+=K
73 add w22,w22,w28 // future e+=K
84 add w21,w21,w28 // future e+=K
98 add w20,w20,w28 // future e+=K
109 add w24,w24,w28 // future e+=K
123 add w23,w23,w28 // future e+=K
134 add w22,w22,w28 // future e+=K
[all …]
/external/boringssl/linux-aarch64/crypto/fipsmodule/
Dsha256-armv8.S95 eor w28,w21,w22 // magic seed
113 and w28,w28,w19 // (b^c)&=(a^b)
115 eor w28,w28,w21 // Maj(a,b,c)
117 add w27,w27,w28 // h+=Maj(a,b,c)
118 ldr w28,[x30],#4 // *K++, w19 in next round
126 add w26,w26,w28 // h+=K[i]
129 bic w28,w25,w23
131 orr w17,w17,w28 // Ch(e,f,g)
132 eor w28,w27,w20 // a^b, b^c in next round
138 and w19,w19,w28 // (b^c)&=(a^b)
[all …]
Dsha1-armv8.S45 movz w28,#0x7999
47 movk w28,#0x5a82,lsl#16
53 add w24,w24,w28 // warm it up
60 add w23,w23,w28 // future e+=K
74 add w22,w22,w28 // future e+=K
85 add w21,w21,w28 // future e+=K
99 add w20,w20,w28 // future e+=K
110 add w24,w24,w28 // future e+=K
124 add w23,w23,w28 // future e+=K
135 add w22,w22,w28 // future e+=K
[all …]
/external/capstone/suite/MC/Mips/
Dtest_3r.s.cs13 0x79,0x7c,0x70,0x90 = adds_s.d $w2, $w14, $w28
35 0x7a,0xab,0xe7,0x10 = ave_u.h $w28, $w28, $w11
37 0x7a,0xfc,0x9f,0x90 = ave_u.d $w30, $w19, $w28
40 0x7b,0x59,0x97,0x10 = aver_s.w $w28, $w18, $w25
47 0x79,0xbc,0xac,0x0d = bclr.h $w16, $w21, $w28
56 0x7b,0xdc,0x1e,0x8d = binsr.w $w26, $w3, $w28
59 0x7a,0xa4,0x87,0x0d = bneg.h $w28, $w16, $w4
100 0x79,0x36,0xe0,0x53 = dpadd_s.h $w1, $w28, $w22
108 0x7a,0x7c,0x67,0xd3 = dpsub_s.d $w31, $w12, $w28
112 0x7a,0x22,0xc7,0x15 = hadd_s.h $w28, $w24, $w2
[all …]
Dtest_3rf.s.cs2 0x78,0x1c,0x9f,0x1b = fadd.w $w28, $w19, $w28
10 0x79,0x08,0x47,0x1a = fclt.w $w28, $w8, $w8
33 0x79,0x35,0xe2,0xdb = fmadd.d $w11, $w28, $w21
66 0x7a,0x5c,0x90,0xda = fsun.w $w3, $w18, $w28
73 0x79,0x69,0x17,0x1c = madd_q.w $w28, $w2, $w9
77 0x79,0xbc,0xf3,0x5c = msub_q.w $w13, $w30, $w28
Dtest_elm.s.cs13 0x78,0x61,0xe6,0x19 = splati.h $w24, $w28[1]
15 0x78,0x78,0x0f,0x19 = splati.d $w28, $w1[0]
/external/llvm/test/MC/Mips/msa/
Dtest_3r.s14 # CHECK: adds_s.d $w2, $w14, $w28 # encoding: [0x79,0x7c,0x70,0x90]
36 # CHECK: ave_u.h $w28, $w28, $w11 # encoding: [0x7a,0xab,0xe7,0x10]
38 # CHECK: ave_u.d $w30, $w19, $w28 # encoding: [0x7a,0xfc,0x9f,0x90]
41 # CHECK: aver_s.w $w28, $w18, $w25 # encoding: [0x7b,0x59,0x97,0x10]
48 # CHECK: bclr.h $w16, $w21, $w28 # encoding: [0x79,0xbc,0xac,0x0d]
57 # CHECK: binsr.w $w26, $w3, $w28 # encoding: [0x7b,0xdc,0x1e,0x8d]
60 # CHECK: bneg.h $w28, $w16, $w4 # encoding: [0x7a,0xa4,0x87,0x0d]
101 # CHECK: dpadd_s.h $w1, $w28, $w22 # encoding: [0x79,0x36,0xe0,0x53]
109 # CHECK: dpsub_s.d $w31, $w12, $w28 # encoding: [0x7a,0x7c,0x67,0xd3]
113 # CHECK: hadd_s.h $w28, $w24, $w2 # encoding: [0x7a,0x22,0xc7,0x15]
[all …]
Dtest_3rf.s3 # CHECK: fadd.w $w28, $w19, $w28 # encoding: [0x78,0x1c,0x9f,0x1b]
11 # CHECK: fclt.w $w28, $w8, $w8 # encoding: [0x79,0x08,0x47,0x1a]
34 # CHECK: fmadd.d $w11, $w28, $w21 # encoding: [0x79,0x35,0xe2,0xdb]
67 # CHECK: fsun.w $w3, $w18, $w28 # encoding: [0x7a,0x5c,0x90,0xda]
74 # CHECK: madd_q.w $w28, $w2, $w9 # encoding: [0x79,0x69,0x17,0x1c]
78 # CHECK: msub_q.w $w13, $w30, $w28 # encoding: [0x79,0xbc,0xf3,0x5c]
86 fadd.w $w28, $w19, $w28
94 fclt.w $w28, $w8, $w8
117 fmadd.d $w11, $w28, $w21
150 fsun.w $w3, $w18, $w28
[all …]
Dtest_elm.s13 splati.h $w24, $w28[1] # CHECK: splati.h $w24, $w28[1] # encoding: [0x78,0x61,0xe6,0x19]
15 splati.d $w28, $w1[0] # CHECK: splati.d $w28, $w1[0] # encoding: [0x78,0x78,0x0f,0x19]
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/msa/
Dtest_3r.s14 # CHECK: adds_s.d $w2, $w14, $w28 # encoding: [0x79,0x7c,0x70,0x90]
36 # CHECK: ave_u.h $w28, $w28, $w11 # encoding: [0x7a,0xab,0xe7,0x10]
38 # CHECK: ave_u.d $w30, $w19, $w28 # encoding: [0x7a,0xfc,0x9f,0x90]
41 # CHECK: aver_s.w $w28, $w18, $w25 # encoding: [0x7b,0x59,0x97,0x10]
48 # CHECK: bclr.h $w16, $w21, $w28 # encoding: [0x79,0xbc,0xac,0x0d]
57 # CHECK: binsr.w $w26, $w3, $w28 # encoding: [0x7b,0xdc,0x1e,0x8d]
60 # CHECK: bneg.h $w28, $w16, $w4 # encoding: [0x7a,0xa4,0x87,0x0d]
101 # CHECK: dpadd_s.h $w1, $w28, $w22 # encoding: [0x79,0x36,0xe0,0x53]
109 # CHECK: dpsub_s.d $w31, $w12, $w28 # encoding: [0x7a,0x7c,0x67,0xd3]
113 # CHECK: hadd_s.h $w28, $w24, $w2 # encoding: [0x7a,0x22,0xc7,0x15]
[all …]
Dtest_3rf.s3 # CHECK: fadd.w $w28, $w19, $w28 # encoding: [0x78,0x1c,0x9f,0x1b]
11 # CHECK: fclt.w $w28, $w8, $w8 # encoding: [0x79,0x08,0x47,0x1a]
34 # CHECK: fmadd.d $w11, $w28, $w21 # encoding: [0x79,0x35,0xe2,0xdb]
67 # CHECK: fsun.w $w3, $w18, $w28 # encoding: [0x7a,0x5c,0x90,0xda]
74 # CHECK: madd_q.w $w28, $w2, $w9 # encoding: [0x79,0x69,0x17,0x1c]
78 # CHECK: msub_q.w $w13, $w30, $w28 # encoding: [0x79,0xbc,0xf3,0x5c]
86 fadd.w $w28, $w19, $w28
94 fclt.w $w28, $w8, $w8
117 fmadd.d $w11, $w28, $w21
150 fsun.w $w3, $w18, $w28
[all …]
Dtest_elm.s13 splati.h $w24, $w28[1] # CHECK: splati.h $w24, $w28[1] # encoding: [0x78,0x61,0xe6,0x19]
15 splati.d $w28, $w1[0] # CHECK: splati.d $w28, $w1[0] # encoding: [0x78,0x78,0x0f,0x19]
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/Mips/msa/
Dtest_3r.txt14 0x79 0x7c 0x70 0x90 # CHECK: adds_s.d $w2, $w14, $w28
36 0x7a 0xab 0xe7 0x10 # CHECK: ave_u.h $w28, $w28, $w11
38 0x7a 0xfc 0x9f 0x90 # CHECK: ave_u.d $w30, $w19, $w28
41 0x7b 0x59 0x97 0x10 # CHECK: aver_s.w $w28, $w18, $w25
48 0x79 0xbc 0xac 0x0d # CHECK: bclr.h $w16, $w21, $w28
57 0x7b 0xdc 0x1e 0x8d # CHECK: binsr.w $w26, $w3, $w28
60 0x7a 0xa4 0x87 0x0d # CHECK: bneg.h $w28, $w16, $w4
101 0x79 0x36 0xe0 0x53 # CHECK: dpadd_s.h $w1, $w28, $w22
109 0x7a 0x7c 0x67 0xd3 # CHECK: dpsub_s.d $w31, $w12, $w28
113 0x7a 0x22 0xc7 0x15 # CHECK: hadd_s.h $w28, $w24, $w2
[all …]
Dtest_3rf.txt3 0x78 0x1c 0x9f 0x1b # CHECK: fadd.w $w28, $w19, $w28
11 0x79 0x08 0x47 0x1a # CHECK: fclt.w $w28, $w8, $w8
34 0x79 0x35 0xe2 0xdb # CHECK: fmadd.d $w11, $w28, $w21
67 0x7a 0x5c 0x90 0xda # CHECK: fsun.w $w3, $w18, $w28
74 0x79 0x69 0x17 0x1c # CHECK: madd_q.w $w28, $w2, $w9
78 0x79 0xbc 0xf3 0x5c # CHECK: msub_q.w $w13, $w30, $w28
Dtest_elm.txt13 0x78 0x61 0xe6 0x19 # CHECK: splati.h $w24, $w28[1]
15 0x78 0x78 0x0f 0x19 # CHECK: splati.d $w28, $w1[0]
/external/llvm/test/MC/Disassembler/Mips/msa/
Dtest_3r.txt14 0x79 0x7c 0x70 0x90 # CHECK: adds_s.d $w2, $w14, $w28
36 0x7a 0xab 0xe7 0x10 # CHECK: ave_u.h $w28, $w28, $w11
38 0x7a 0xfc 0x9f 0x90 # CHECK: ave_u.d $w30, $w19, $w28
41 0x7b 0x59 0x97 0x10 # CHECK: aver_s.w $w28, $w18, $w25
48 0x79 0xbc 0xac 0x0d # CHECK: bclr.h $w16, $w21, $w28
57 0x7b 0xdc 0x1e 0x8d # CHECK: binsr.w $w26, $w3, $w28
60 0x7a 0xa4 0x87 0x0d # CHECK: bneg.h $w28, $w16, $w4
101 0x79 0x36 0xe0 0x53 # CHECK: dpadd_s.h $w1, $w28, $w22
109 0x7a 0x7c 0x67 0xd3 # CHECK: dpsub_s.d $w31, $w12, $w28
113 0x7a 0x22 0xc7 0x15 # CHECK: hadd_s.h $w28, $w24, $w2
[all …]
Dtest_3rf.txt3 0x78 0x1c 0x9f 0x1b # CHECK: fadd.w $w28, $w19, $w28
11 0x79 0x08 0x47 0x1a # CHECK: fclt.w $w28, $w8, $w8
34 0x79 0x35 0xe2 0xdb # CHECK: fmadd.d $w11, $w28, $w21
67 0x7a 0x5c 0x90 0xda # CHECK: fsun.w $w3, $w18, $w28
74 0x79 0x69 0x17 0x1c # CHECK: madd_q.w $w28, $w2, $w9
78 0x79 0xbc 0xf3 0x5c # CHECK: msub_q.w $w13, $w30, $w28
Dtest_elm.txt13 0x78 0x61 0xe6 0x19 # CHECK: splati.h $w24, $w28[1]
15 0x78 0x78 0x0f 0x19 # CHECK: splati.d $w28, $w1[0]
/external/boringssl/src/crypto/fipsmodule/sha/
Dsha1-altivec.c247 const vec_uint32_t w28 = sched_16_31(vw + 7, w24, w20, w16, w12, k); in sha1_block_data_order() local
253 const vec_uint32_t w32 = sched_32_79(vw + 8, w28, w24, w16, w4, w0, k); in sha1_block_data_order()
259 const vec_uint32_t w36 = sched_32_79(vw + 9, w32, w28, w20, w8, w4, k); in sha1_block_data_order()
272 const vec_uint32_t w44 = sched_32_79(vw + 11, w40, w36, w28, w16, w12, k); in sha1_block_data_order()
290 const vec_uint32_t w56 = sched_32_79(vw + 14, w52, w48, w40, w28, w24, k); in sha1_block_data_order()
297 const vec_uint32_t w60 = sched_32_79(vw + 15, w56, w52, w44, w32, w28, k); in sha1_block_data_order()
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AArch64/
Dtls-relocs.s117 add w27, w28, #:dtprel_lo12_nc:var
319 add w27, w28, #:tprel_lo12_nc:var
Darm64-basic-a64-instructions.s4 crc32h w28, wzr, w30
/external/llvm/test/MC/AArch64/
Dtls-relocs.s117 add w27, w28, #:dtprel_lo12_nc:var
319 add w27, w28, #:tprel_lo12_nc:var
Darm64-basic-a64-instructions.s4 crc32h w28, wzr, w30
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips32r2/
Dinvalid-msa.s9 …bmnz.v $w15,$w2,$w28 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU f…
11 …bsel.v $w28,$w7,$w0 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU f…
13 …fclass.w $w19,$w28 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU f…

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