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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/
Drelax-per-target-feature.ll17 ; Function has thumb2 target-feature, tail call is allowed and must be widened.
27 ; generated as it cannot be widened.
Dwiden-vmovs.ll8 ; The vmovs is first widened to a vmovd, and then converted to a vorr because of the v2f32 vadd.f32.
/external/llvm/lib/Target/SystemZ/
DSystemZCallingConv.td24 // Match if this specific argument was widened from a short vector type.
54 // Sub-128 vectors are returned in the same way, but they're widened
93 // are passed in the same way, but they're widened to one of these types
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/SystemZ/
DSystemZCallingConv.td24 // Match if this specific argument was widened from a short vector type.
54 // Sub-128 vectors are returned in the same way, but they're widened
93 // are passed in the same way, but they're widened to one of these types
/external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/LoopVectorize/
Dvect-phiscev-sext-trunc.ll9 ; that these casts, do not get vectorized/scalarized/widened.
40 ; In the case of widened induction, this means that the induction phi
87 ; the induction is not vectorized but rather only the step is widened.
108 ; In the case of widened induction, this means that the induction phi
Dfirst-order-recurrence.ll495 ; widened, the second is a cast that will be widened and needs to sink after the
497 ; instead of widened. Although the cast and the first instruction will both be
498 ; widened, and are originally adjacent to each other, make sure the replicated
528 store i32 7, i32* %arraycidx ; 1st instruction, to be widened.
530 %1 = load i16, i16* %cur.index ; 3rd, first-order-recurring load not widened.
/external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/IndVarSimplify/
Dlftr-wide-trip-count.ll77 ; Trip count should be widened and LFTR should canonicalize the condition
114 ; Trip count should be widened and LFTR should canonicalize the condition
152 ; Trip count should be widened and LFTR should canonicalize the condition
Delim-extend.ll71 ; %innercount is currently blocked by lcssa, so is not widened.
72 ; %inneriv can be widened only after proving it has no signed-overflow
Div-widen.ll120 ; check that the induction variable of the inner loop has been widened after indvars.
136 ; check that the induction variable of the inner loop has been widened after indvars.
/external/swiftshader/third_party/subzero/docs/
DASAN.rst42 contain widened loads that would cause false positives. To avoid reporting such
44 widened load and only check the first byte of the loaded word against shadow
/external/swiftshader/third_party/LLVM/test/Transforms/IndVarSimplify/
Delim-extend.ll69 ; %innercount is currently blocked by lcssa, so is not widened.
70 ; %inneriv can be widened only after proving it has no signed-overflow
/external/llvm/test/Transforms/IndVarSimplify/
Delim-extend.ll69 ; %innercount is currently blocked by lcssa, so is not widened.
70 ; %inneriv can be widened only after proving it has no signed-overflow
/external/swiftshader/third_party/LLVM/test/CodeGen/ARM/
Dwiden-vmovs.ll8 ; The vmovs is first widened to a vmovd, and then converted to a vorr because of the v2f32 vadd.f32.
/external/llvm/test/CodeGen/ARM/
Dwiden-vmovs.ll8 ; The vmovs is first widened to a vmovd, and then converted to a vorr because of the v2f32 vadd.f32.
/external/swiftshader/third_party/subzero/tests_lit/asan_tests/
Dwideloads.ll1 ; Test that potentially widened loads to not trigger an error report
/external/llvm/test/Instrumentation/AddressSanitizer/
Dasan-vs-gvn.ll2 ; ASAN conflicts with load widening iff the widened load accesses data out of bounds
/external/swiftshader/third_party/llvm-7.0/llvm/test/Instrumentation/AddressSanitizer/
Dasan-vs-gvn.ll2 ; ASAN conflicts with load widening iff the widened load accesses data out of bounds
/external/clang/test/OpenMP/
Dfor_simd_codegen.cpp598 void widened(float *a, float *b, float *c, float *d) { in widened() function
Dparallel_for_simd_codegen.cpp551 void widened(float *a, float *b, float *c, float *d) { in widened() function
Dsimd_codegen.cpp433 void widened(float *a, float *b, float *c, float *d) { in widened() function
/external/swiftshader/third_party/llvm-7.0/llvm/docs/Proposals/
DVectorizationPlan.rst45 vectorizer. The output IR contains code that has been vectorized or "widened"
145 instructions; e.g., cloned once, replicated multiple times or widened
189 cast may sink past a later instruction and be widened to handle first-order
/external/swiftshader/third_party/llvm-7.0/llvm/test/DebugInfo/Generic/
Dindvar-discriminator.ll3 ; When the induction variable is widened by indvars, check that the debug loc
/external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/IndVarSimplify/AMDGPU/
Dno-widen-to-i64.ll5 ; Induction variables should not be widened for 64-bit integers,
/external/llvm/test/Transforms/IndVarSimplify/AMDGPU/
Dno-widen-to-i64.ll5 ; Induction variables should not be widened for 64-bit integers,
/external/llvm/test/Transforms/GVN/
Dload-pre-nonlocal.ll53 ; %1 is partially redundant if %0 can be widened to a 64-bit load.

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