Searched refs:wqm (Results 1 – 17 of 17) sorted by relevance
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AMDGPU/ |
D | llvm.amdgcn.wqm.vote.ll | 10 %w = call i1 @llvm.amdgcn.wqm.vote(i1 %c) 19 %w = call i1 @llvm.amdgcn.wqm.vote(i1 true) 28 %w = call i1 @llvm.amdgcn.wqm.vote(i1 false) 43 %w = call i1 @llvm.amdgcn.wqm.vote(i1 %c) 50 declare i1 @llvm.amdgcn.wqm.vote(i1)
|
D | llvm.amdgcn.kill.ll | 226 ; SI-LABEL: {{^}}wqm: 230 define amdgpu_ps void @wqm(float %a) { 232 %c2 = call i1 @llvm.amdgcn.wqm.vote(i1 %c1) 276 declare i1 @llvm.amdgcn.wqm.vote(i1)
|
D | wqm.mir | 1 # RUN: llc -march=amdgcn -verify-machineinstrs -run-pass si-wqm -o - %s | FileCheck %s
|
D | wqm.ll | 113 ; Check that WQM is triggered by the wqm intrinsic. 125 %out.0 = call float @llvm.amdgcn.wqm.f32(float %out) 129 ; Check that the wqm intrinsic works correctly for integers. 142 %out.1 = call i32 @llvm.amdgcn.wqm.i32(i32 %out.0) 258 %out.0 = call float @llvm.amdgcn.wqm.f32(float %out) 329 %src0.1 = call i32 @llvm.amdgcn.wqm.i32(i32 %src0.0) 577 ; CHECK-NOT: wqm 795 declare float @llvm.amdgcn.wqm.f32(float) #3 796 declare i32 @llvm.amdgcn.wqm.i32(i32) #3 812 attributes #5 = { "amdgpu-ps-wqm-outputs" }
|
D | spill-m0.ll | 99 %lds_data = call float @llvm.amdgcn.wqm.f32(float %lds_data_) 212 declare float @llvm.amdgcn.wqm.f32(float) #1
|
/external/llvm/lib/Target/AMDGPU/ |
D | SIInstrInfo.td | 3506 int wqm, 3514 let WQM = wqm; 3519 int channels, int wqm> { 3520 def _V1 : MIMG_Sampler_Helper <op, asm, dst_rc, VGPR_32, wqm, 3523 def _V2 : MIMG_Sampler_Helper <op, asm, dst_rc, VReg_64, wqm>, 3525 def _V4 : MIMG_Sampler_Helper <op, asm, dst_rc, VReg_128, wqm>, 3527 def _V8 : MIMG_Sampler_Helper <op, asm, dst_rc, VReg_256, wqm>, 3529 def _V16 : MIMG_Sampler_Helper <op, asm, dst_rc, VReg_512, wqm>, 3533 multiclass MIMG_Sampler <bits<7> op, string asm, int wqm=0> { 3534 defm _V1 : MIMG_Sampler_Src_Helper<op, asm, VGPR_32, 1, wqm>; [all …]
|
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
D | MIMGInstructions.td | 397 multiclass MIMG_Sampler <bits<7> op, AMDGPUSampleVariant sample, bit wqm = 0, 404 let BaseOpcode = !cast<MIMGBaseOpcode>(NAME), WQM = wqm, 420 multiclass MIMG_Gather <bits<7> op, AMDGPUSampleVariant sample, bit wqm = 0, 426 let BaseOpcode = !cast<MIMGBaseOpcode>(NAME), WQM = wqm,
|
D | SIInstructions.td | 111 // Pseudoinstruction for @llvm.amdgcn.wqm. It is turned into a copy after the
|
/external/mesa3d/src/gallium/drivers/radeonsi/ |
D | si_shader.h | 478 unsigned wqm:1; member
|
D | si_shader.c | 6187 key->ps_prolog.wqm = info->uses_derivatives && in si_get_ps_prolog_key() 7702 if (key->ps_prolog.wqm) { in si_build_ps_prolog_function()
|
/external/llvm/test/CodeGen/AMDGPU/ |
D | wqm.ll | 326 ; CHECK-NOT: wqm 366 attributes #4 = { "amdgpu-ps-wqm-outputs" }
|
/external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/InstCombine/AMDGPU/ |
D | amdgcn-intrinsics.ll | 1691 ; llvm.amdgcn.wqm.vote 1694 declare i1 @llvm.amdgcn.wqm.vote(i1) 1700 %w = call i1 @llvm.amdgcn.wqm.vote(i1 true) 1709 %w = call i1 @llvm.amdgcn.wqm.vote(i1 false) 1718 %w = call i1 @llvm.amdgcn.wqm.vote(i1 undef)
|
/external/swiftshader/third_party/llvm-7.0/configs/common/include/llvm/IR/ |
D | IntrinsicEnums.inc | 983 amdgcn_wqm, // llvm.amdgcn.wqm 984 amdgcn_wqm_vote, // llvm.amdgcn.wqm.vote
|
D | IntrinsicImpl.inc | 1009 "llvm.amdgcn.wqm", 1010 "llvm.amdgcn.wqm.vote", 9887 4, // llvm.amdgcn.wqm 9888 33, // llvm.amdgcn.wqm.vote
|
/external/toolchain-utils/android_bench_suite/panorama_input/ |
D | test_007.ppm | 4042 �z{������������������wqm���������������������;.,'nZZR>>�~~���������������O86), 6111 …�����_toL{tR�^��u��|�������������������������Ƽ����������ú�����������ϲ�����wqm{vn��z��~�����������…
|
D | test_011.ppm | 4572 …ҷ�ϴ�˰�ȭ�ĭ�ĵ�ȶ�ɵ�ɺ�ͻ�Ϸ�˹�Ⱥ�ɺ�ɾ����������˰�����������RTSRSQPQO`_[kifhe_nkeke`wqm�w}xp|vq|vqvpnvpn~w…
|
D | test_003.ppm | 6942 …t�����������������������������������������������")>H0vhqmakfZokbwskhb^wqm��}���������v�_HX0=]…
|