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Searched refs:write_domain (Results 1 – 25 of 29) sorted by relevance

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/external/libdrm/radeon/
Dradeon_cs_space.c44 uint32_t read_domains, write_domain; in radeon_cs_setup_bo() local
50 write_domain = sc->write_domain; in radeon_cs_setup_bo()
54 bo->space_accounted = sc->new_accounted = (read_domains << 16) | write_domain; in radeon_cs_setup_bo()
59 if (write_domain && (write_domain == bo->space_accounted)) { in radeon_cs_setup_bo()
69 if (write_domain) { in radeon_cs_setup_bo()
70 if (write_domain == RADEON_GEM_DOMAIN_VRAM) in radeon_cs_setup_bo()
72 else if (write_domain == RADEON_GEM_DOMAIN_GTT) in radeon_cs_setup_bo()
74 sc->new_accounted = write_domain; in radeon_cs_setup_bo()
85 if (write_domain && (old_read & write_domain)) { in radeon_cs_setup_bo()
86 sc->new_accounted = write_domain; in radeon_cs_setup_bo()
[all …]
Dradeon_cs_gem.c65 uint32_t write_domain; member
175 uint32_t write_domain, in cs_gem_write_reloc() argument
187 if ((read_domain && write_domain) || (!read_domain && !write_domain)) { in cs_gem_write_reloc()
196 if (write_domain == RADEON_GEM_DOMAIN_CPU) { in cs_gem_write_reloc()
217 if (write_domain && (reloc->read_domain & write_domain)) { in cs_gem_write_reloc()
219 reloc->write_domain = write_domain; in cs_gem_write_reloc()
220 } else if (read_domain & reloc->write_domain) { in cs_gem_write_reloc()
223 if (write_domain != reloc->write_domain) in cs_gem_write_reloc()
230 reloc->write_domain |= write_domain; in cs_gem_write_reloc()
264 reloc->write_domain = write_domain; in cs_gem_write_reloc()
Dradeon_cs.h44 uint32_t write_domain; member
86 uint32_t write_domain,
99 uint32_t write_domain);
113 uint32_t write_domain);
Dradeon_cs_int.h8 uint32_t write_domain; member
41 uint32_t write_domain,
Dradeon_cs.c15 uint32_t read_domain, uint32_t write_domain, in radeon_cs_write_reloc() argument
23 write_domain, in radeon_cs_write_reloc()
Dradeon_bo_gem.c344 radeon_gem_set_domain(struct radeon_bo *bo, uint32_t read_domains, uint32_t write_domain) in radeon_gem_set_domain() argument
352 args.write_domain = write_domain; in radeon_gem_set_domain()
Dradeon_bo_gem.h42 int radeon_gem_set_domain(struct radeon_bo *bo, uint32_t read_domains, uint32_t write_domain);
/external/mesa3d/src/gallium/winsys/i915/drm/
Di915_drm_batchbuffer.c101 unsigned write_domain = 0; in i915_drm_batchbuffer_reloc() local
108 write_domain = 0; in i915_drm_batchbuffer_reloc()
112 write_domain = I915_GEM_DOMAIN_RENDER; in i915_drm_batchbuffer_reloc()
116 write_domain = I915_GEM_DOMAIN_RENDER; in i915_drm_batchbuffer_reloc()
120 write_domain = 0; in i915_drm_batchbuffer_reloc()
124 write_domain = 0; in i915_drm_batchbuffer_reloc()
138 write_domain); in i915_drm_batchbuffer_reloc()
143 write_domain); in i915_drm_batchbuffer_reloc()
/external/mesa3d/src/mesa/drivers/dri/i915/
Dintel_batchbuffer.h44 uint32_t write_domain,
49 uint32_t write_domain,
139 #define OUT_RELOC(buf, read_domains, write_domain, delta) do { \ argument
141 read_domains, write_domain, delta); \
143 #define OUT_RELOC_FENCED(buf, read_domains, write_domain, delta) do { \ argument
145 read_domains, write_domain, delta); \
Dintel_batchbuffer.c197 uint32_t read_domains, uint32_t write_domain, in intel_batchbuffer_emit_reloc() argument
204 read_domains, write_domain); in intel_batchbuffer_emit_reloc()
222 uint32_t write_domain, in intel_batchbuffer_emit_reloc_fenced() argument
229 read_domains, write_domain); in intel_batchbuffer_emit_reloc_fenced()
/external/libdrm/intel/
Dintel_bufmgr.c201 uint32_t read_domains, uint32_t write_domain) in drm_intel_bo_emit_reloc() argument
205 read_domains, write_domain); in drm_intel_bo_emit_reloc()
212 uint32_t read_domains, uint32_t write_domain) in drm_intel_bo_emit_reloc_fence() argument
216 read_domains, write_domain); in drm_intel_bo_emit_reloc_fence()
Dintel_bufmgr_priv.h190 uint32_t read_domains, uint32_t write_domain);
195 uint32_t write_domain);
Dintel_bufmgr_fake.c85 uint32_t write_domain; member
202 uint32_t write_domain; member
1252 uint32_t read_domains, uint32_t write_domain) in drm_intel_fake_emit_reloc() argument
1287 r->write_domain = write_domain; in drm_intel_fake_emit_reloc()
1324 target_fake->write_domain |= r->write_domain; in drm_intel_fake_calculate_domains()
1372 if (bo_fake->write_domain != 0) { in drm_intel_fake_reloc_and_validate_buffer()
1409 bo_fake->write_domain = 0; in drm_intel_bo_fake_post_submit()
Dintel_bufmgr_gem.c1480 set_domain.write_domain = I915_GEM_DOMAIN_CPU; in drm_intel_gem_bo_map()
1482 set_domain.write_domain = 0; in drm_intel_gem_bo_map()
1593 set_domain.write_domain = I915_GEM_DOMAIN_GTT; in drm_intel_gem_bo_map_gtt()
1885 set_domain.write_domain = write_enable ? I915_GEM_DOMAIN_GTT : 0; in drm_intel_gem_bo_start_gtt_access()
1892 set_domain.read_domains, set_domain.write_domain, in drm_intel_gem_bo_start_gtt_access()
1952 uint32_t read_domains, uint32_t write_domain, in do_bo_emit_reloc() argument
1985 assert((write_domain & (write_domain - 1)) == 0); in do_bo_emit_reloc()
2019 bo_gem->relocs[bo_gem->reloc_count].write_domain = write_domain; in do_bo_emit_reloc()
2078 uint32_t read_domains, uint32_t write_domain) in drm_intel_gem_bo_emit_reloc() argument
2087 read_domains, write_domain, in drm_intel_gem_bo_emit_reloc()
[all …]
Dintel_bufmgr.h153 uint32_t read_domains, uint32_t write_domain);
157 uint32_t read_domains, uint32_t write_domain);
/external/mesa3d/src/intel/vulkan/
Danv_gem.c139 uint32_t read_domains, uint32_t write_domain) in anv_gem_set_domain() argument
144 .write_domain = write_domain, in anv_gem_set_domain()
Danv_gem_stubs.c120 uint32_t read_domains, uint32_t write_domain) in anv_gem_set_domain() argument
/external/mesa3d/src/gallium/winsys/radeon/drm/
Dradeon_drm_cs.h125 return cs->csc->relocs[index].write_domain != 0; in radeon_bo_is_referenced_by_cs_for_write()
Dradeon_drm_cs.c275 reloc->write_domain = 0; in radeon_lookup_or_add_real_buffer()
365 added_domains = (rd | wd) & ~(reloc->read_domains | reloc->write_domain); in radeon_drm_cs_add_buffer()
367 reloc->write_domain |= wd; in radeon_drm_cs_add_buffer()
735 if ((usage & RADEON_USAGE_WRITE) && cs->csc->relocs[index].write_domain) in radeon_bo_is_referenced()
/external/minigbm/
Di915.c521 set_domain.write_domain = I915_GEM_DOMAIN_CPU; in i915_bo_invalidate()
525 set_domain.write_domain = I915_GEM_DOMAIN_GTT; in i915_bo_invalidate()
/external/kernel-headers/original/uapi/drm/
Dradeon_drm.h879 __u32 write_domain; member
979 __u32 write_domain; member
Di915_drm.h742 __u32 write_domain; member
792 __u32 write_domain; member
/external/libdrm/include/drm/
Dradeon_drm.h880 __u32 write_domain; member
980 __u32 write_domain; member
Di915_drm.h712 __u32 write_domain; member
762 __u32 write_domain; member
/external/mesa3d/include/drm-uapi/
Di915_drm.h670 __u32 write_domain; member
720 __u32 write_domain; member

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