/external/libdrm/radeon/ |
D | radeon_cs_space.c | 44 uint32_t read_domains, write_domain; in radeon_cs_setup_bo() local 50 write_domain = sc->write_domain; in radeon_cs_setup_bo() 54 bo->space_accounted = sc->new_accounted = (read_domains << 16) | write_domain; in radeon_cs_setup_bo() 59 if (write_domain && (write_domain == bo->space_accounted)) { in radeon_cs_setup_bo() 69 if (write_domain) { in radeon_cs_setup_bo() 70 if (write_domain == RADEON_GEM_DOMAIN_VRAM) in radeon_cs_setup_bo() 72 else if (write_domain == RADEON_GEM_DOMAIN_GTT) in radeon_cs_setup_bo() 74 sc->new_accounted = write_domain; in radeon_cs_setup_bo() 85 if (write_domain && (old_read & write_domain)) { in radeon_cs_setup_bo() 86 sc->new_accounted = write_domain; in radeon_cs_setup_bo() [all …]
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D | radeon_cs_gem.c | 65 uint32_t write_domain; member 175 uint32_t write_domain, in cs_gem_write_reloc() argument 187 if ((read_domain && write_domain) || (!read_domain && !write_domain)) { in cs_gem_write_reloc() 196 if (write_domain == RADEON_GEM_DOMAIN_CPU) { in cs_gem_write_reloc() 217 if (write_domain && (reloc->read_domain & write_domain)) { in cs_gem_write_reloc() 219 reloc->write_domain = write_domain; in cs_gem_write_reloc() 220 } else if (read_domain & reloc->write_domain) { in cs_gem_write_reloc() 223 if (write_domain != reloc->write_domain) in cs_gem_write_reloc() 230 reloc->write_domain |= write_domain; in cs_gem_write_reloc() 264 reloc->write_domain = write_domain; in cs_gem_write_reloc()
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D | radeon_cs.h | 44 uint32_t write_domain; member 86 uint32_t write_domain, 99 uint32_t write_domain); 113 uint32_t write_domain);
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D | radeon_cs_int.h | 8 uint32_t write_domain; member 41 uint32_t write_domain,
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D | radeon_cs.c | 15 uint32_t read_domain, uint32_t write_domain, in radeon_cs_write_reloc() argument 23 write_domain, in radeon_cs_write_reloc()
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D | radeon_bo_gem.c | 344 radeon_gem_set_domain(struct radeon_bo *bo, uint32_t read_domains, uint32_t write_domain) in radeon_gem_set_domain() argument 352 args.write_domain = write_domain; in radeon_gem_set_domain()
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D | radeon_bo_gem.h | 42 int radeon_gem_set_domain(struct radeon_bo *bo, uint32_t read_domains, uint32_t write_domain);
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/external/mesa3d/src/gallium/winsys/i915/drm/ |
D | i915_drm_batchbuffer.c | 101 unsigned write_domain = 0; in i915_drm_batchbuffer_reloc() local 108 write_domain = 0; in i915_drm_batchbuffer_reloc() 112 write_domain = I915_GEM_DOMAIN_RENDER; in i915_drm_batchbuffer_reloc() 116 write_domain = I915_GEM_DOMAIN_RENDER; in i915_drm_batchbuffer_reloc() 120 write_domain = 0; in i915_drm_batchbuffer_reloc() 124 write_domain = 0; in i915_drm_batchbuffer_reloc() 138 write_domain); in i915_drm_batchbuffer_reloc() 143 write_domain); in i915_drm_batchbuffer_reloc()
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/external/mesa3d/src/mesa/drivers/dri/i915/ |
D | intel_batchbuffer.h | 44 uint32_t write_domain, 49 uint32_t write_domain, 139 #define OUT_RELOC(buf, read_domains, write_domain, delta) do { \ argument 141 read_domains, write_domain, delta); \ 143 #define OUT_RELOC_FENCED(buf, read_domains, write_domain, delta) do { \ argument 145 read_domains, write_domain, delta); \
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D | intel_batchbuffer.c | 197 uint32_t read_domains, uint32_t write_domain, in intel_batchbuffer_emit_reloc() argument 204 read_domains, write_domain); in intel_batchbuffer_emit_reloc() 222 uint32_t write_domain, in intel_batchbuffer_emit_reloc_fenced() argument 229 read_domains, write_domain); in intel_batchbuffer_emit_reloc_fenced()
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/external/libdrm/intel/ |
D | intel_bufmgr.c | 201 uint32_t read_domains, uint32_t write_domain) in drm_intel_bo_emit_reloc() argument 205 read_domains, write_domain); in drm_intel_bo_emit_reloc() 212 uint32_t read_domains, uint32_t write_domain) in drm_intel_bo_emit_reloc_fence() argument 216 read_domains, write_domain); in drm_intel_bo_emit_reloc_fence()
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D | intel_bufmgr_priv.h | 190 uint32_t read_domains, uint32_t write_domain); 195 uint32_t write_domain);
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D | intel_bufmgr_fake.c | 85 uint32_t write_domain; member 202 uint32_t write_domain; member 1252 uint32_t read_domains, uint32_t write_domain) in drm_intel_fake_emit_reloc() argument 1287 r->write_domain = write_domain; in drm_intel_fake_emit_reloc() 1324 target_fake->write_domain |= r->write_domain; in drm_intel_fake_calculate_domains() 1372 if (bo_fake->write_domain != 0) { in drm_intel_fake_reloc_and_validate_buffer() 1409 bo_fake->write_domain = 0; in drm_intel_bo_fake_post_submit()
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D | intel_bufmgr_gem.c | 1480 set_domain.write_domain = I915_GEM_DOMAIN_CPU; in drm_intel_gem_bo_map() 1482 set_domain.write_domain = 0; in drm_intel_gem_bo_map() 1593 set_domain.write_domain = I915_GEM_DOMAIN_GTT; in drm_intel_gem_bo_map_gtt() 1885 set_domain.write_domain = write_enable ? I915_GEM_DOMAIN_GTT : 0; in drm_intel_gem_bo_start_gtt_access() 1892 set_domain.read_domains, set_domain.write_domain, in drm_intel_gem_bo_start_gtt_access() 1952 uint32_t read_domains, uint32_t write_domain, in do_bo_emit_reloc() argument 1985 assert((write_domain & (write_domain - 1)) == 0); in do_bo_emit_reloc() 2019 bo_gem->relocs[bo_gem->reloc_count].write_domain = write_domain; in do_bo_emit_reloc() 2078 uint32_t read_domains, uint32_t write_domain) in drm_intel_gem_bo_emit_reloc() argument 2087 read_domains, write_domain, in drm_intel_gem_bo_emit_reloc() [all …]
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D | intel_bufmgr.h | 153 uint32_t read_domains, uint32_t write_domain); 157 uint32_t read_domains, uint32_t write_domain);
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/external/mesa3d/src/intel/vulkan/ |
D | anv_gem.c | 139 uint32_t read_domains, uint32_t write_domain) in anv_gem_set_domain() argument 144 .write_domain = write_domain, in anv_gem_set_domain()
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D | anv_gem_stubs.c | 120 uint32_t read_domains, uint32_t write_domain) in anv_gem_set_domain() argument
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/external/mesa3d/src/gallium/winsys/radeon/drm/ |
D | radeon_drm_cs.h | 125 return cs->csc->relocs[index].write_domain != 0; in radeon_bo_is_referenced_by_cs_for_write()
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D | radeon_drm_cs.c | 275 reloc->write_domain = 0; in radeon_lookup_or_add_real_buffer() 365 added_domains = (rd | wd) & ~(reloc->read_domains | reloc->write_domain); in radeon_drm_cs_add_buffer() 367 reloc->write_domain |= wd; in radeon_drm_cs_add_buffer() 735 if ((usage & RADEON_USAGE_WRITE) && cs->csc->relocs[index].write_domain) in radeon_bo_is_referenced()
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/external/minigbm/ |
D | i915.c | 521 set_domain.write_domain = I915_GEM_DOMAIN_CPU; in i915_bo_invalidate() 525 set_domain.write_domain = I915_GEM_DOMAIN_GTT; in i915_bo_invalidate()
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/external/kernel-headers/original/uapi/drm/ |
D | radeon_drm.h | 879 __u32 write_domain; member 979 __u32 write_domain; member
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D | i915_drm.h | 742 __u32 write_domain; member 792 __u32 write_domain; member
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/external/libdrm/include/drm/ |
D | radeon_drm.h | 880 __u32 write_domain; member 980 __u32 write_domain; member
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D | i915_drm.h | 712 __u32 write_domain; member 762 __u32 write_domain; member
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/external/mesa3d/include/drm-uapi/ |
D | i915_drm.h | 670 __u32 write_domain; member 720 __u32 write_domain; member
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