| /external/mesa3d/src/gallium/winsys/radeon/drm/ |
| D | radeon_drm_winsys.c | 81 if (drmCommandWriteRead(applier->ws->fd, DRM_RADEON_INFO, in radeon_set_fd_access()
125 static bool do_winsys_init(struct radeon_drm_winsys *ws) in do_winsys_init() argument
152 version = drmGetVersion(ws->fd); in do_winsys_init()
165 ws->info.drm_major = version->version_major; in do_winsys_init()
166 ws->info.drm_minor = version->version_minor; in do_winsys_init()
167 ws->info.drm_patchlevel = version->version_patchlevel; in do_winsys_init()
171 if (!radeon_get_drm_value(ws->fd, RADEON_INFO_DEVICE_ID, "PCI ID", in do_winsys_init()
172 &ws->info.pci_id)) in do_winsys_init()
176 switch (ws->info.pci_id) { in do_winsys_init()
177 #define CHIPSET(pci_id, name, cfamily) case pci_id: ws->info.family = CHIP_##cfamily; ws->gen = DRV… in do_winsys_init()
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| D | radeon_drm_bo.c | 737 struct radeon_drm_winsys *ws = priv; in radeon_bo_slab_alloc() local
746 slab->buffer = radeon_bo(radeon_winsys_bo_create(&ws->base, in radeon_bo_slab_alloc()
762 base_hash = __sync_fetch_and_add(&ws->next_bo_hash, slab->base.num_entries); in radeon_bo_slab_alloc()
771 bo->rws = ws; in radeon_bo_slab_alloc()
922 struct radeon_drm_winsys *ws = radeon_drm_winsys(rws); in radeon_winsys_bo_create() local
942 ws->info.has_virtual_memory && in radeon_winsys_bo_create()
950 entry = pb_slab_alloc(&ws->bo_slabs, size, heap); in radeon_winsys_bo_create()
953 pb_cache_release_all_buffers(&ws->bo_cache); in radeon_winsys_bo_create()
955 entry = pb_slab_alloc(&ws->bo_slabs, size, heap); in radeon_winsys_bo_create()
976 size = align(size, ws->info.gart_page_size); in radeon_winsys_bo_create()
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| /external/mesa3d/src/gallium/winsys/amdgpu/drm/ |
| D | amdgpu_winsys.c | 51 static bool do_winsys_init(struct amdgpu_winsys *ws, int fd) in do_winsys_init() argument
53 if (!ac_query_gpu_info(fd, ws->dev, &ws->info, &ws->amdinfo)) in do_winsys_init()
57 if (ws->info.chip_class >= GFX9 && HAVE_LLVM < 0x0500) { in do_winsys_init()
63 ws->addrlib = amdgpu_addr_create(&ws->info, &ws->amdinfo, &ws->info.max_alignment); in do_winsys_init()
64 if (!ws->addrlib) { in do_winsys_init()
69 ws->check_vm = strstr(debug_get_option("R600_DEBUG", ""), "check_vm") != NULL; in do_winsys_init()
70 ws->debug_all_bos = debug_get_option_all_bos(); in do_winsys_init()
71 ws->reserve_vmid = strstr(debug_get_option("R600_DEBUG", ""), "reserve_vmid") != NULL; in do_winsys_init()
76 amdgpu_device_deinitialize(ws->dev); in do_winsys_init()
77 ws->dev = NULL; in do_winsys_init()
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| D | amdgpu_bo.c | 59 struct amdgpu_winsys *ws = bo->ws; in amdgpu_bo_wait() local
93 simple_mtx_lock(&ws->bo_fence_lock); in amdgpu_bo_wait()
109 simple_mtx_unlock(&ws->bo_fence_lock); in amdgpu_bo_wait()
115 simple_mtx_lock(&ws->bo_fence_lock); in amdgpu_bo_wait()
123 simple_mtx_unlock(&ws->bo_fence_lock); in amdgpu_bo_wait()
128 simple_mtx_lock(&ws->bo_fence_lock); in amdgpu_bo_wait()
142 simple_mtx_unlock(&ws->bo_fence_lock); in amdgpu_bo_wait()
170 if (bo->ws->debug_all_bos) { in amdgpu_bo_destroy()
171 simple_mtx_lock(&bo->ws->global_bo_list_lock); in amdgpu_bo_destroy()
173 bo->ws->num_buffers--; in amdgpu_bo_destroy()
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| /external/mesa3d/src/amd/vulkan/winsys/amdgpu/ |
| D | radv_amdgpu_winsys.c | 43 do_winsys_init(struct radv_amdgpu_winsys *ws, int fd) in do_winsys_init() argument
45 if (!ac_query_gpu_info(fd, ws->dev, &ws->info, &ws->amdinfo)) in do_winsys_init()
49 if (ws->info.chip_class >= GFX9 && HAVE_LLVM < 0x0500) { in do_winsys_init()
55 ws->addrlib = amdgpu_addr_create(&ws->info, &ws->amdinfo, &ws->info.max_alignment); in do_winsys_init()
56 if (!ws->addrlib) { in do_winsys_init()
61 ws->info.num_sdma_rings = MIN2(ws->info.num_sdma_rings, MAX_RINGS_PER_TYPE); in do_winsys_init()
62 ws->info.num_compute_rings = MIN2(ws->info.num_compute_rings, MAX_RINGS_PER_TYPE); in do_winsys_init()
64 ws->use_ib_bos = ws->info.chip_class >= CIK; in do_winsys_init()
77 struct radv_amdgpu_winsys *ws = (struct radv_amdgpu_winsys *)rws; in radv_amdgpu_winsys_query_value() local
83 amdgpu_query_info(ws->dev, AMDGPU_INFO_TIMESTAMP, 8, &retval); in radv_amdgpu_winsys_query_value()
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| D | radv_amdgpu_cs.c | 43 struct radv_amdgpu_winsys *ws; member
166 cs->ws->base.buffer_destroy(cs->ib_buffer); in radv_amdgpu_cs_destroy()
171 cs->ws->base.buffer_destroy(cs->old_ib_buffers[i]); in radv_amdgpu_cs_destroy()
198 radv_amdgpu_cs_create(struct radeon_winsys *ws, in radv_amdgpu_cs_create() argument
207 cs->ws = radv_amdgpu_winsys(ws); in radv_amdgpu_cs_create()
210 if (cs->ws->use_ib_bos) { in radv_amdgpu_cs_create()
211 cs->ib_buffer = ws->buffer_create(ws, ib_size, 0, in radv_amdgpu_cs_create()
221 cs->ib_mapped = ws->buffer_map(cs->ib_buffer); in radv_amdgpu_cs_create()
223 ws->buffer_destroy(cs->ib_buffer); in radv_amdgpu_cs_create()
234 ws->cs_add_buffer(&cs->base, cs->ib_buffer, 8); in radv_amdgpu_cs_create()
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| D | radv_amdgpu_bo.c | 43 radv_amdgpu_bo_va_op(struct radv_amdgpu_winsys *ws, in radv_amdgpu_bo_va_op() argument
54 if ((bo_flags & RADEON_FLAG_VA_UNCACHED) && ws->info.chip_class >= GFX9) in radv_amdgpu_bo_va_op()
62 return amdgpu_bo_va_op_raw(ws->dev, bo, offset, size, addr, in radv_amdgpu_bo_va_op()
76 int r = radv_amdgpu_bo_va_op(bo->ws, range->bo->bo, range->bo_offset, in radv_amdgpu_winsys_virtual_map()
92 int r = radv_amdgpu_bo_va_op(bo->ws, range->bo->bo, range->bo_offset, in radv_amdgpu_winsys_virtual_unmap()
261 if (bo->ws->debug_all_bos) { in radv_amdgpu_winsys_bo_destroy()
262 pthread_mutex_lock(&bo->ws->global_bo_list_lock); in radv_amdgpu_winsys_bo_destroy()
264 bo->ws->num_buffers--; in radv_amdgpu_winsys_bo_destroy()
265 pthread_mutex_unlock(&bo->ws->global_bo_list_lock); in radv_amdgpu_winsys_bo_destroy()
267 radv_amdgpu_bo_va_op(bo->ws, bo->bo, 0, bo->size, bo->base.va, in radv_amdgpu_winsys_bo_destroy()
[all …]
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| /external/pdfium/core/fxcrt/xml/ |
| D | cfx_xmldoc.cpp | 58 WideString ws = L"<?xml version=\"1.0\" encoding=\""; in SaveXMLNode() local
61 ws += L"UTF-16"; in SaveXMLNode()
63 ws += L"UTF-16be"; in SaveXMLNode()
65 ws += L"UTF-8"; in SaveXMLNode()
67 ws += L"\"?>"; in SaveXMLNode()
68 pXMLStream->WriteString(ws.AsStringView()); in SaveXMLNode()
70 WideString ws = in SaveXMLNode() local
72 pXMLStream->WriteString(ws.AsStringView()); in SaveXMLNode()
82 ws = L" "; in SaveXMLNode()
83 ws += it.first; in SaveXMLNode()
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| D | cfx_xmlnode.cpp | 335 WideString ws; in SaveXMLNode() local
338 ws = L"<?xml version=\"1.0\" encoding=\""; in SaveXMLNode()
341 ws += L"UTF-16"; in SaveXMLNode()
343 ws += L"UTF-16be"; in SaveXMLNode()
345 ws += L"UTF-8"; in SaveXMLNode()
347 ws += L"\"?>"; in SaveXMLNode()
348 pXMLStream->WriteString(ws.AsStringView()); in SaveXMLNode()
350 ws = WideString::Format(L"<?%ls", pInstruction->GetName().c_str()); in SaveXMLNode()
351 pXMLStream->WriteString(ws.AsStringView()); in SaveXMLNode()
361 ws = L" "; in SaveXMLNode()
[all …]
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| /external/v8/src/mips/ |
| D | assembler-mips.h | 1146 void addvi_b(MSARegister wd, MSARegister ws, uint32_t imm5);
1147 void addvi_h(MSARegister wd, MSARegister ws, uint32_t imm5);
1148 void addvi_w(MSARegister wd, MSARegister ws, uint32_t imm5);
1149 void addvi_d(MSARegister wd, MSARegister ws, uint32_t imm5);
1150 void subvi_b(MSARegister wd, MSARegister ws, uint32_t imm5);
1151 void subvi_h(MSARegister wd, MSARegister ws, uint32_t imm5);
1152 void subvi_w(MSARegister wd, MSARegister ws, uint32_t imm5);
1153 void subvi_d(MSARegister wd, MSARegister ws, uint32_t imm5);
1154 void maxi_s_b(MSARegister wd, MSARegister ws, uint32_t imm5);
1155 void maxi_s_h(MSARegister wd, MSARegister ws, uint32_t imm5);
[all …]
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| /external/catch2/examples/ |
| D | 210-Evt-EventListeners.cpp | 20 std::string ws(int const level) { in ws() function
38 os << ws(level ) << title << ":\n" in print()
39 << ws(level+1) << "- file: " << info.file << "\n" in print()
40 << ws(level+1) << "- line: " << info.line << "\n"; in print()
52 os << ws(level+1) << "- macroName: '" << info.macroName << "'\n" in print()
53 << ws(level+1) << "- message '" << info.message << "'\n"; in print()
55 os << ws(level+1) << "- sequence " << info.sequence << "\n"; in print()
59 os << ws(level ) << title << ":\n"; in print()
62 os << ws(level+1) << "{\n"; in print()
64 os << ws(level+1) << "}\n"; in print()
[all …]
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| /external/v8/src/mips64/ |
| D | assembler-mips64.h | 1218 void addvi_b(MSARegister wd, MSARegister ws, uint32_t imm5);
1219 void addvi_h(MSARegister wd, MSARegister ws, uint32_t imm5);
1220 void addvi_w(MSARegister wd, MSARegister ws, uint32_t imm5);
1221 void addvi_d(MSARegister wd, MSARegister ws, uint32_t imm5);
1222 void subvi_b(MSARegister wd, MSARegister ws, uint32_t imm5);
1223 void subvi_h(MSARegister wd, MSARegister ws, uint32_t imm5);
1224 void subvi_w(MSARegister wd, MSARegister ws, uint32_t imm5);
1225 void subvi_d(MSARegister wd, MSARegister ws, uint32_t imm5);
1226 void maxi_s_b(MSARegister wd, MSARegister ws, uint32_t imm5);
1227 void maxi_s_h(MSARegister wd, MSARegister ws, uint32_t imm5);
[all …]
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| /external/syzkaller/vendor/golang.org/x/net/http2/ |
| D | writesched_priority.go | 69 ws := &priorityWriteScheduler{
75 ws.nodes[0] = &ws.root
77 ws.writeThrottleLimit = 1024
79 ws.writeThrottleLimit = math.MaxInt32
81 return ws
257 func (ws *priorityWriteScheduler) OpenStream(streamID uint32, options OpenStreamOptions) {
259 if curr := ws.nodes[streamID]; curr != nil {
271 parent := ws.nodes[options.PusherID]
273 parent = &ws.root
276 q: *ws.queuePool.get(),
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| D | writesched_random.go | 29 func (ws *randomWriteScheduler) OpenStream(streamID uint32, options OpenStreamOptions) {
33 func (ws *randomWriteScheduler) CloseStream(streamID uint32) {
34 q, ok := ws.sq[streamID]
38 delete(ws.sq, streamID)
39 ws.queuePool.put(q)
42 func (ws *randomWriteScheduler) AdjustStream(streamID uint32, priority PriorityParam) {
46 func (ws *randomWriteScheduler) Push(wr FrameWriteRequest) {
49 ws.zero.push(wr)
52 q, ok := ws.sq[id]
54 q = ws.queuePool.get()
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| /external/libcxx/test/std/localization/locales/locale.convenience/conversions/conversions.string/ |
| D | from_bytes.pass.cpp | 40 std::wstring ws = myconv.from_bytes('a'); in test() local
41 assert(ws == L"a"); in test()
42 ws = myconv.from_bytes(bs.c_str()); in test()
43 assert(ws == L"\x1005"); in test()
44 ws = myconv.from_bytes(bs); in test()
45 assert(ws == L"\x1005"); in test()
46 ws = myconv.from_bytes(bs.data(), bs.data() + bs.size()); in test()
47 assert(ws == L"\x1005"); in test()
48 ws = myconv.from_bytes(""); in test()
49 assert(ws.size() == 0); in test()
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| D | to_bytes.pass.cpp | 39 std::wstring ws(1, CharT(0x1005)); in test() local
40 std::string bs = myconv.to_bytes(ws[0]); in test()
42 bs = myconv.to_bytes(ws.c_str()); in test()
44 bs = myconv.to_bytes(ws); in test()
46 bs = myconv.to_bytes(ws.data(), ws.data() + ws.size()); in test()
58 std::wstring ws(1, CharT(0x40003)); in test() local
59 std::string bs = myconv.to_bytes(ws[0]); in test()
61 bs = myconv.to_bytes(ws.c_str()); in test()
63 bs = myconv.to_bytes(ws); in test()
65 bs = myconv.to_bytes(ws.data(), ws.data() + ws.size()); in test()
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| /external/cn-cbor/src/ |
| D | cn-encoder.c | 38 #define ensure_writable(sz) if ((ws->offset<0) || (ws->offset + (sz) >= ws->size)) { \
39 ws->offset = -1; \
44 ws->buf[ws->offset++] = (b); \
45 memcpy(ws->buf+ws->offset, (data), (sz)); \
46 ws->offset += sz;
49 ws->buf[ws->offset++] = (b); \
79 static void _write_positive(cn_write_state *ws, cn_cbor_type typ, uint64_t val) { in _write_positive() argument
86 ws->offset = -1; in _write_positive()
116 static void _write_double(cn_write_state *ws, double val) in _write_double() argument
221 if (ws->offset < 0) { return; }
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| /external/mesa3d/src/gallium/winsys/sw/dri/ |
| D | dri_sw_winsys.c | 67 dri_sw_winsys( struct sw_winsys *ws ) in dri_sw_winsys() argument
69 return (struct dri_sw_winsys *)ws; in dri_sw_winsys()
74 dri_sw_is_displaytarget_format_supported( struct sw_winsys *ws, in dri_sw_is_displaytarget_format_supported() argument
123 dri_sw_displaytarget_destroy(struct sw_winsys *ws, in dri_sw_displaytarget_destroy() argument
134 dri_sw_displaytarget_map(struct sw_winsys *ws, in dri_sw_displaytarget_map() argument
142 struct dri_sw_winsys *dri_sw_ws = dri_sw_winsys(ws); in dri_sw_displaytarget_map()
150 dri_sw_displaytarget_unmap(struct sw_winsys *ws, in dri_sw_displaytarget_unmap() argument
155 struct dri_sw_winsys *dri_sw_ws = dri_sw_winsys(ws); in dri_sw_displaytarget_unmap()
182 dri_sw_displaytarget_display(struct sw_winsys *ws, in dri_sw_displaytarget_display() argument
187 struct dri_sw_winsys *dri_sw_ws = dri_sw_winsys(ws); in dri_sw_displaytarget_display()
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| /external/mesa3d/src/amd/vulkan/ |
| D | radv_radeon_winsys.h | 181 void (*destroy)(struct radeon_winsys *ws);
183 void (*query_info)(struct radeon_winsys *ws,
186 uint64_t (*query_value)(struct radeon_winsys *ws,
189 bool (*read_registers)(struct radeon_winsys *ws, unsigned reg_offset,
192 const char *(*get_chip_name)(struct radeon_winsys *ws);
194 struct radeon_winsys_bo *(*buffer_create)(struct radeon_winsys *ws,
203 struct radeon_winsys_bo *(*buffer_from_fd)(struct radeon_winsys *ws,
207 bool (*buffer_get_fd)(struct radeon_winsys *ws,
219 struct radeon_winsys_ctx *(*ctx_create)(struct radeon_winsys *ws,
226 struct radeon_winsys_cs *(*cs_create)(struct radeon_winsys *ws,
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| /external/mesa3d/src/gallium/winsys/sw/kms-dri/ |
| D | kms_dri_sw_winsys.c | 93 kms_sw_winsys( struct sw_winsys *ws ) in kms_sw_winsys() argument
95 return (struct kms_sw_winsys *)ws; in kms_sw_winsys()
100 kms_sw_is_displaytarget_format_supported( struct sw_winsys *ws, in kms_sw_is_displaytarget_format_supported() argument
109 kms_sw_displaytarget_create(struct sw_winsys *ws, in kms_sw_displaytarget_create() argument
117 struct kms_sw_winsys *kms_sw = kms_sw_winsys(ws); in kms_sw_displaytarget_create()
162 kms_sw_displaytarget_destroy(struct sw_winsys *ws, in kms_sw_displaytarget_destroy() argument
165 struct kms_sw_winsys *kms_sw = kms_sw_winsys(ws); in kms_sw_displaytarget_destroy()
185 kms_sw_displaytarget_map(struct sw_winsys *ws, in kms_sw_displaytarget_map() argument
189 struct kms_sw_winsys *kms_sw = kms_sw_winsys(ws); in kms_sw_displaytarget_map()
275 kms_sw_displaytarget_unmap(struct sw_winsys *ws, in kms_sw_displaytarget_unmap() argument
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/ |
| D | MipsMSAInstrFormats.td | 32 bits<5> ws;
39 let Inst{15-11} = ws;
45 bits<5> ws;
52 let Inst{15-11} = ws;
58 bits<5> ws;
65 let Inst{15-11} = ws;
71 bits<5> ws;
78 let Inst{15-11} = ws;
106 bits<5> ws;
111 let Inst{15-11} = ws;
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| /external/llvm/lib/Target/Mips/ |
| D | MipsMSAInstrFormats.td | 31 bits<5> ws;
38 let Inst{15-11} = ws;
44 bits<5> ws;
51 let Inst{15-11} = ws;
57 bits<5> ws;
64 let Inst{15-11} = ws;
70 bits<5> ws;
77 let Inst{15-11} = ws;
105 bits<5> ws;
110 let Inst{15-11} = ws;
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| /external/mesa3d/src/gallium/drivers/radeonsi/ |
| D | si_fence.c | 59 struct radeon_winsys *ws = rctx->ws; in si_add_fence_dependency() local
62 ws->cs_add_fence_dependency(rctx->dma.cs, fence); in si_add_fence_dependency()
63 ws->cs_add_fence_dependency(rctx->gfx.cs, fence); in si_add_fence_dependency()
70 struct radeon_winsys *ws = ((struct si_screen*)screen)->ws; in si_fence_reference() local
75 ws->fence_reference(&(*rdst)->gfx, NULL); in si_fence_reference()
76 ws->fence_reference(&(*rdst)->sdma, NULL); in si_fence_reference()
189 struct radeon_winsys *rws = ((struct si_screen*)screen)->ws; in si_fence_finish()
304 struct radeon_winsys *ws = sscreen->ws; in si_create_fence_fd() local
316 rfence->gfx = ws->fence_import_sync_file(ws, fd); in si_create_fence_fd()
329 struct radeon_winsys *ws = sscreen->ws; in si_fence_get_fd() local
[all …]
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| /external/python/setuptools/pkg_resources/tests/ |
| D | test_resources.py | 75 ws = WorkingSet([])
81 assert ad.best_match(req, ws).version == '1.9'
83 ws.add(foo14)
84 assert ad.best_match(req, ws).version == '1.4'
87 ws = WorkingSet([])
88 ws.add(foo12)
89 ws.add(foo14)
91 ad.best_match(req, ws)
94 ws = WorkingSet([])
95 ws.add(foo14)
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| /external/mesa3d/src/gallium/drivers/r600/ |
| D | r600_pipe_common.c | 268 ctx->ws->cs_is_buffer_referenced(ctx->gfx.cs, dst->buf, in r600_need_dma_space()
271 ctx->ws->cs_is_buffer_referenced(ctx->gfx.cs, src->buf, in r600_need_dma_space()
288 if (!ctx->ws->cs_check_space(ctx->dma.cs, num_dw) || in r600_need_dma_space()
299 ctx->ws->cs_is_buffer_referenced(ctx->dma.cs, dst->buf, in r600_need_dma_space()
302 ctx->ws->cs_is_buffer_referenced(ctx->dma.cs, src->buf, in r600_need_dma_space()
352 struct radeon_winsys *ws = rctx->ws; in r600_add_fence_dependency() local
355 ws->cs_add_fence_dependency(rctx->dma.cs, fence); in r600_add_fence_dependency()
356 ws->cs_add_fence_dependency(rctx->gfx.cs, fence); in r600_add_fence_dependency()
399 struct radeon_winsys *ws = rctx->ws; in r600_flush_from_st() local
414 ws->fence_reference(&gfx_fence, rctx->last_gfx_fence); in r600_flush_from_st()
[all …]
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