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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/PowerPC/
Dppc64-encoding-e500.txt8 0x11 0xd5 0xe3 0x00
10 0x11 0xd5 0xe3 0x02
12 0x11 0xd5 0xe3 0x04
14 0x11 0xd5 0xe3 0x08
16 0x11 0xd5 0xe3 0x0c
18 0x11 0xd5 0xe3 0x0e
20 0x11 0xd5 0xe3 0x10
22 0x11 0xd5 0xe3 0x14
24 0x11 0xd5 0xe3 0x16
26 0x11 0xd5 0xe3 0x18
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/AArch64/
Dtrace-regs.txt9 # CHECK: mrs x11, {{trcidr9|TRCIDR9}}
34 0x98 0x11 0x31 0xd5
45 # CHECK: mrs x11, {{trcauthstatus|TRCAUTHSTATUS}}
65 # CHECK: mrs x11, {{trcpidr2|TRCPIDR2}}
77 # CHECK: mrs x11, {{trcprgctlr|TRCPRGCTLR}}
119 # CHECK: mrs x11, {{trcseqevr1|TRCSEQEVR1}}
178 0x11 0x17 0x31 0xd5
184 0x11 0x1a 0x31 0xd5
198 0x3d 0x11 0x31 0xd5
227 # CHECK: mrs x11, {{trcrsctlr31|TRCRSCTLR31}}
[all …]
/external/llvm/test/MC/Disassembler/AArch64/
Dtrace-regs.txt9 # CHECK: mrs x11, {{trcidr9|TRCIDR9}}
34 0x98 0x11 0x31 0xd5
45 # CHECK: mrs x11, {{trcauthstatus|TRCAUTHSTATUS}}
65 # CHECK: mrs x11, {{trcpidr2|TRCPIDR2}}
77 # CHECK: mrs x11, {{trcprgctlr|TRCPRGCTLR}}
119 # CHECK: mrs x11, {{trcseqevr1|TRCSEQEVR1}}
178 0x11 0x17 0x31 0xd5
184 0x11 0x1a 0x31 0xd5
198 0x3d 0x11 0x31 0xd5
227 # CHECK: mrs x11, {{trcrsctlr31|TRCRSCTLR31}}
[all …]
/external/llvm/test/MC/Disassembler/Hexagon/
Dalu32_alu.txt7 0x11 0xdf 0x15 0xf3
9 0x11 0xdf 0x55 0xf6
17 0x11 0xdf 0x15 0xf1
19 0x11 0xdf 0x35 0xf1
21 0x11 0xdf 0x75 0xf1
23 0x11 0xd5 0x9f 0xf1
25 0x11 0xd5 0xbf 0xf1
35 0x11 0xdf 0x35 0xf3
37 0x11 0xdf 0xd5 0xf6
41 0x11 0xc0 0xbf 0x70
[all …]
Dnv_j.txt5 0x11 0x40 0x71 0x70 0x92 0xd5 0x02 0x20
8 0x11 0x40 0x71 0x70 0x92 0xf5 0x02 0x20
11 0x11 0x40 0x71 0x70 0x92 0xd5 0x42 0x20
14 0x11 0x40 0x71 0x70 0x92 0xf5 0x42 0x20
17 0x11 0x40 0x71 0x70 0x92 0xd5 0x82 0x20
20 0x11 0x40 0x71 0x70 0x92 0xf5 0x82 0x20
23 0x11 0x40 0x71 0x70 0x92 0xd5 0xc2 0x20
26 0x11 0x40 0x71 0x70 0x92 0xf5 0xc2 0x20
29 0x11 0x40 0x71 0x70 0x92 0xd5 0x02 0x21
32 0x11 0x40 0x71 0x70 0x92 0xf5 0x02 0x21
[all …]
Dalu32_pred.txt27 0x11 0xe3 0x15 0x70
29 0x03 0x40 0x45 0x85 0x11 0xe7 0x15 0x70
32 0x11 0xeb 0x15 0x70
34 0x03 0x40 0x45 0x85 0x11 0xef 0x15 0x70
37 0x11 0xe3 0x35 0x70
39 0x03 0x40 0x45 0x85 0x11 0xe7 0x35 0x70
42 0x11 0xeb 0x35 0x70
44 0x03 0x40 0x45 0x85 0x11 0xef 0x35 0x70
105 0x11 0xe3 0xb5 0x70
107 0x11 0xeb 0xb5 0x70
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/Hexagon/
Dalu32_alu.txt7 0x11 0xdf 0x15 0xf3
9 0x11 0xdf 0x55 0xf6
17 0x11 0xdf 0x15 0xf1
19 0x11 0xdf 0x35 0xf1
21 0x11 0xdf 0x75 0xf1
23 0x11 0xd5 0x9f 0xf1
25 0x11 0xd5 0xbf 0xf1
35 0x11 0xdf 0x35 0xf3
37 0x11 0xdf 0xd5 0xf6
41 0x11 0xc0 0xbf 0x70
[all …]
Dnv_j.txt5 0x11 0x40 0x71 0x70 0x92 0xd5 0x02 0x20
8 0x11 0x40 0x71 0x70 0x92 0xf5 0x02 0x20
11 0x11 0x40 0x71 0x70 0x92 0xd5 0x42 0x20
14 0x11 0x40 0x71 0x70 0x92 0xf5 0x42 0x20
17 0x11 0x40 0x71 0x70 0x92 0xd5 0x82 0x20
20 0x11 0x40 0x71 0x70 0x92 0xf5 0x82 0x20
23 0x11 0x40 0x71 0x70 0x92 0xd5 0xc2 0x20
26 0x11 0x40 0x71 0x70 0x92 0xf5 0xc2 0x20
29 0x11 0x40 0x71 0x70 0x92 0xd5 0x02 0x21
32 0x11 0x40 0x71 0x70 0x92 0xf5 0x02 0x21
[all …]
Dalu32_pred.txt27 0x11 0xe3 0x15 0x70
29 0x03 0x40 0x45 0x85 0x11 0xe7 0x15 0x70
32 0x11 0xeb 0x15 0x70
34 0x03 0x40 0x45 0x85 0x11 0xef 0x15 0x70
37 0x11 0xe3 0x35 0x70
39 0x03 0x40 0x45 0x85 0x11 0xe7 0x35 0x70
42 0x11 0xeb 0x35 0x70
44 0x03 0x40 0x45 0x85 0x11 0xef 0x35 0x70
105 0x11 0xe3 0xb5 0x70
107 0x11 0xeb 0xb5 0x70
[all …]
Dmemop.txt5 0x95 0xd9 0x11 0x3e
7 0xb5 0xd9 0x11 0x3e
9 0xd5 0xd9 0x11 0x3e
11 0xf5 0xd9 0x11 0x3e
13 0x95 0xd9 0x11 0x3f
15 0xb5 0xd9 0x11 0x3f
17 0xd5 0xd9 0x11 0x3f
19 0xf5 0xd9 0x11 0x3f
/external/libhevc/common/arm64/
Dihevc_inter_pred_chroma_horz_w16out.s126 mov x11, #2
187 ld1 { v0.2s},[x12],x11 //vector load pu1_src
188 ld1 { v1.2s},[x19],x11 //vector load pu1_src
191 ld1 { v2.2s},[x12],x11 //vector load pu1_src
192 ld1 { v3.2s},[x19],x11 //vector load pu1_src
196 ld1 { v4.2s},[x12],x11 //vector load pu1_src
197 ld1 { v5.2s},[x19],x11 //vector load pu1_src
207 ld1 { v29.2s},[x4],x11 //vector load pu1_src
208 ld1 { v31.2s},[x19],x11 //vector load pu1_src
212 ld1 { v10.2s},[x4],x11 //vector load pu1_src
[all …]
Dihevc_inter_pred_chroma_horz.s128 mov x11,#2
175 ld1 { v0.2s},[x12],x11 //vector load pu1_src
176 ld1 { v1.2s},[x19],x11 //vector load pu1_src
180 ld1 { v2.2s},[x12],x11 //vector load pu1_src
181 ld1 { v3.2s},[x19],x11 //vector load pu1_src
183 ld1 { v4.2s},[x12],x11 //vector load pu1_src
184 ld1 { v5.2s},[x19],x11 //vector load pu1_src
192 ld1 { v29.2s},[x4],x11 //vector load pu1_src
193 ld1 { v9.2s},[x19],x11 //vector load pu1_src
197 ld1 { v10.2s},[x4],x11 //vector load pu1_src
[all …]
Dihevc_intra_pred_chroma_ver.s122 lsl x11, x3, #2
124 sub x11, x11, #16
132 st2 {v22.8b, v23.8b}, [x2], x11
133 st2 {v22.8b, v23.8b}, [x5], x11
134 st2 {v22.8b, v23.8b}, [x8], x11
135 st2 {v22.8b, v23.8b}, [x10], x11
145 st2 {v22.8b, v23.8b}, [x2], x11
146 st2 {v22.8b, v23.8b}, [x5], x11
147 st2 {v22.8b, v23.8b}, [x8], x11
148 st2 {v22.8b, v23.8b}, [x10], x11
[all …]
Dihevc_sao_edge_offset_class3_chroma.s95 mov x25,x11 // ht 0x44
115 madd x11, x10, x1, x0 //pu1_src[(ht - 1) * src_strd + col]
119 LD1 {v0.8b},[x11],#8 //pu1_src[(ht - 1) * src_strd + col]
129 SUB x11,x7,#1 //[wd - 1]
130 LDRB w10,[x0,x11] //u1_pos_0_0_tmp_v = pu1_src[wd - 1]
133 mov x11, x16 //Load pu1_src_top_right from sp
134 LDRB w11,[x11] //pu1_src_top_right[0]
135 SUB x12,x9,x11 //pu1_src[wd - 2] - pu1_src_top_right[0]
141 ADD x11,x0,x1 //pu1_src + src_strd
143 LDRB w14,[x11,x14] //pu1_src[wd - 2 - 2 + src_strd]
[all …]
Dihevc_sao_edge_offset_class2_chroma.s96 mov x25,x11 // ht 0x44
118 madd x11, x10, x1, x0 //pu1_src[(ht - 1) * src_strd + col]
122 LD1 {v0.8b},[x11],#8 //pu1_src[(ht - 1) * src_strd + col]
137 SUB x12,x9,x11 //pu1_src[0] - pu1_src_top_left[0]
144 SUB x11,x9,x14 //pu1_src[0] - pu1_src[2 + src_strd]
149 CMP x11,#0
151 csel x11, x20, x11,LT
155 csel x11, x20, x11,GT //SIGN(pu1_src[0] - pu1_src[2 + src_strd])
157 …ADD x11,x12,x11 //SIGN(pu1_src[0] - pu1_src_top_left[0]) + SIGN(pu1_src[0…
158 ADD x11,x11,#2 //edge_idx
[all …]
Dihevc_intra_pred_chroma_dc.s184 smov x11, v17.s[0]
187 add x11,x11,x4
190 lsr x11,x11,x12
200 csel x11, x6, x11,eq
212 csel x11, x20, x11,ne
243 st2 {v16.8b, v17.8b}, [x2],x11
244 st2 {v16.8b, v17.8b}, [x5],x11
245 st2 {v16.8b, v17.8b}, [x8],x11
246 st2 {v16.8b, v17.8b}, [x10],x11
278 smov x11, v18.s[0]
[all …]
Dihevc_sao_edge_offset_class3.s104 madd x11, x10, x1, x0 //pu1_src[(ht - 1) * src_strd + col]
108 LD1 {v0.8b},[x11],#8 //pu1_src[(ht - 1) * src_strd + col]
120 MOV x11,x20 //Load pu1_src_top_right from sp
123 LDRB w11,[x11] //pu1_src_top_right[0]
124 SUB x12,x9,x11 //pu1_src[wd - 1] - pu1_src_top_right[0]
126 ADD x11,x0,x1 //pu1_src + src_strd
128 LDRB w14,[x11,x10] //pu1_src[wd - 1 - 1 + src_strd]
132 SUB x11,x9,x14 //pu1_src[wd - 1] - pu1_src[wd - 1 - 1 + src_strd]
136 CMP x11,#0
138 csel x11, x20, x11,LT
[all …]
Dihevc_inter_pred_filters_luma_horz.s136 mov x11,#1
204 ld1 {v0.2s},[x12],x11 //vector load pu1_src
205 ld1 {v1.2s},[x12],x11
206 ld1 {v2.2s},[x12],x11
207 ld1 {v3.2s},[x12],x11
228 ld1 {v4.2s},[x12],x11
230 ld1 {v5.2s},[x12],x11
232 ld1 {v6.2s},[x12],x11
234 ld1 {v7.2s},[x12],x11
236 ld1 {v12.2s},[x4],x11 //vector load pu1_src + src_strd
[all …]
Dihevc_intra_pred_luma_vert.s123 lsl x11, x3, #2
125 sub x11, x11, #16
131 st1 {v22.8b, v23.8b}, [x2], x11
132 st1 {v22.8b, v23.8b}, [x5], x11
133 st1 {v22.8b, v23.8b}, [x8], x11
134 st1 {v22.8b, v23.8b}, [x10], x11
144 st1 {v22.8b, v23.8b}, [x2], x11
145 st1 {v22.8b, v23.8b}, [x5], x11
146 st1 {v22.8b, v23.8b}, [x8], x11
147 st1 {v22.8b, v23.8b}, [x10], x11
[all …]
Dihevc_sao_edge_offset_class2.s104 madd x11, x10, x1, x0 //pu1_src[(ht - 1) * src_strd + col]
108 LD1 {v0.8b},[x11],#8 //pu1_src[(ht - 1) * src_strd + col]
122 SUBS x12,x9,x11 //pu1_src[0] - pu1_src_top_left[0]
132 SUBS x11,x9,x4 //pu1_src[0] - pu1_src[1 + src_strd]
135 csel x11, x20, x11,LT
137 csel x11, x20, x11,GT //SIGN(pu1_src[0] - pu1_src[1 + src_strd])
138 …ADD x4,x12,x11 //SIGN(pu1_src[0] - pu1_src_top_left[0]) + SIGN(pu1_src[0…
157 SUB x11,x8,#1 //ht - 1
158 madd x12, x11, x1, x10 //wd - 1 + (ht - 1) * src_strd
169 …SUBS x11,x10,x11 //pu1_src[wd - 1 + (ht - 1) * src_strd] - pu1_src[wd - 1 +…
[all …]
/external/deqp/framework/platform/lnx/
DtcuLnxVulkanPlatform.cpp61 VulkanWindowXlib (MovePtr<x11::XlibWindow> window) in VulkanWindowXlib()
73 UniquePtr<x11::XlibWindow> m_window;
79 VulkanDisplayXlib (MovePtr<x11::DisplayBase> display) in VulkanDisplayXlib()
80 …: vk::wsi::XlibDisplayInterface (vk::pt::XlibDisplayPtr(((x11::XlibDisplay*)display.get())->getXDi… in VulkanDisplayXlib()
87 x11::XlibDisplay* instance = (x11::XlibDisplay*)(m_display.get()); in createWindow()
90 …return new VulkanWindowXlib(MovePtr<x11::XlibWindow>(new x11::XlibWindow(*instance, (int)width, (i… in createWindow()
94 MovePtr<x11::DisplayBase> m_display;
104 VulkanWindowXcb (MovePtr<x11::XcbWindow> window) in VulkanWindowXcb()
116 UniquePtr<x11::XcbWindow> m_window;
122 VulkanDisplayXcb (MovePtr<x11::DisplayBase> display) in VulkanDisplayXcb()
[all …]
/external/boringssl/ios-aarch64/crypto/fipsmodule/
Darmv8-mont.S44 umulh x11,x8,x9
71 adc x7,x11,xzr
77 umulh x11,x8,x9
89 adc x7,x11,xzr
114 umulh x11,x8,x9
134 adc x7,x11,xzr
142 umulh x11,x8,x9
156 adc x7,x11,xzr
237 ldp x10,x11,[x1,#8*4]
311 mul x14,x11,x6
[all …]
/external/boringssl/linux-aarch64/crypto/fipsmodule/
Darmv8-mont.S45 umulh x11,x8,x9
72 adc x7,x11,xzr
78 umulh x11,x8,x9
90 adc x7,x11,xzr
115 umulh x11,x8,x9
135 adc x7,x11,xzr
143 umulh x11,x8,x9
157 adc x7,x11,xzr
238 ldp x10,x11,[x1,#8*4]
312 mul x14,x11,x6
[all …]
/external/libxkbcommon/xkbcommon/
DPACKAGING2 library) and libxkbcommon-x11 (an addon library for XCB clients).
4 The files for libxkbcommon-x11 are:
5 libxkbcommon-x11.a libxkbcommon.so* xkbcommon/xkbcommon-x11.h
6 xkbcommon-x11.map xkbcommon-x11.pc
8 libxkbcommon-x11 can be disabled with --disable-x11 (see
38 Dependencies for libxkbcommon-x11:
43 Dependencies for libxkbcommon-x11 tests:
48 that libxkbcommon and libxkbcommon-x11 be split into separate packages,
/external/libvpx/libvpx/vp9/common/x86/
Dvp9_highbd_iht16x16_add_sse4.c60 x10[2], x11[2], x12[2], x13[2], x14[2], x15[2]; in highbd_iadst16_4col_sse4_1() local
97 x11[0] = _mm_sub_epi64(s3[0], s11[0]); in highbd_iadst16_4col_sse4_1()
98 x11[1] = _mm_sub_epi64(s3[1], s11[1]); in highbd_iadst16_4col_sse4_1()
130 x11[0] = dct_const_round_shift_64bit(x11[0]); in highbd_iadst16_4col_sse4_1()
131 x11[1] = dct_const_round_shift_64bit(x11[1]); in highbd_iadst16_4col_sse4_1()
151 x11[0] = pack_4(x11[0], x11[1]); in highbd_iadst16_4col_sse4_1()
176 highbd_iadst_butterfly_sse4_1(x10[0], x11[0], cospi_20_64, cospi_12_64, s10, in highbd_iadst16_4col_sse4_1()
189 x11[0] = _mm_add_epi64(s11[0], s15[0]); in highbd_iadst16_4col_sse4_1()
190 x11[1] = _mm_add_epi64(s11[1], s15[1]); in highbd_iadst16_4col_sse4_1()
205 x11[0] = dct_const_round_shift_64bit(x11[0]); in highbd_iadst16_4col_sse4_1()
[all …]

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