| /external/boringssl/linux-aarch64/crypto/fipsmodule/ |
| D | sha512-armv8.S | 73 stp x27,x28,[sp,#80]
80 ldp x26,x27,[x0,#6*8]
94 add x27,x27,x19 // h+=K[i]
98 add x27,x27,x3 // h+=X[i]
103 add x27,x27,x17 // h+=Ch(e,f,g)
105 add x27,x27,x16 // h+=Sigma1(e)
107 add x23,x23,x27 // d+=h
110 add x27,x27,x28 // h+=Maj(a,b,c)
117 add x27,x27,x17 // h+=Sigma0(a)
125 eor x28,x27,x20 // a^b, b^c in next round
[all …]
|
| D | armv8-mont.S | 233 stp x27,x28,[sp,#80]
245 sub x27,x5,#8*8
249 sub x27,x27,#8*8
260 cbnz x27,.Lsqr8x_zero
431 sub x27,x3,x1 // done yet?
439 cbz x27,.Lsqr8x_outer_break
461 mov x27,#-8*8
489 add x27,x27,#8
518 ldr x4,[x0,x27]
524 cbnz x27,.Lsqr8x_mul
[all …]
|
| /external/boringssl/ios-aarch64/crypto/fipsmodule/ |
| D | sha512-armv8.S | 72 stp x27,x28,[sp,#80]
79 ldp x26,x27,[x0,#6*8]
93 add x27,x27,x19 // h+=K[i]
97 add x27,x27,x3 // h+=X[i]
102 add x27,x27,x17 // h+=Ch(e,f,g)
104 add x27,x27,x16 // h+=Sigma1(e)
106 add x23,x23,x27 // d+=h
109 add x27,x27,x28 // h+=Maj(a,b,c)
116 add x27,x27,x17 // h+=Sigma0(a)
124 eor x28,x27,x20 // a^b, b^c in next round
[all …]
|
| D | armv8-mont.S | 232 stp x27,x28,[sp,#80]
244 sub x27,x5,#8*8
248 sub x27,x27,#8*8
259 cbnz x27,Lsqr8x_zero
430 sub x27,x3,x1 // done yet?
438 cbz x27,Lsqr8x_outer_break
460 mov x27,#-8*8
488 add x27,x27,#8
517 ldr x4,[x0,x27]
523 cbnz x27,Lsqr8x_mul
[all …]
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AArch64/ |
| D | gicv3-regs.s | 25 mrs x27, icc_ap0r2_el1
30 mrs x27, icc_ap1r3_el1
37 mrs x27, ich_ap1r2_el2
40 mrs x27, ich_misr_el2
116 msr icc_eoir1_el1, x27
134 msr icc_ap0r0_el1, x27
143 msr ich_ap0r1_el2, x27
160 msr ich_lr6_el2, x27
169 msr ich_lr15_el2, x27
|
| D | trace-regs.s | 10 mrs x27, trcidr0
56 mrs x27, trcvdctlr
178 mrs x27, trcdvcvr6
201 mrs x27, trcvmidcvr5
423 msr trcprocselr, x27
427 msr trceventctl1r, x27
457 msr trccntvr1, x27
461 msr trcimspec1, x27
467 msr trcimspec7, x27
499 msr trcssccr1, x27
[all …]
|
| /external/capstone/suite/MC/AArch64/ |
| D | gicv3-regs.s.cs | 24 0xdb,0xc8,0x38,0xd5 = mrs x27, icc_ap0r2_el1
29 0x7b,0xc9,0x38,0xd5 = mrs x27, icc_ap1r3_el1
36 0x5b,0xc9,0x3c,0xd5 = mrs x27, ich_ap1r2_el2
39 0x5b,0xcb,0x3c,0xd5 = mrs x27, ich_misr_el2
58 0x3b,0xcc,0x18,0xd5 = msr icc_eoir1_el1, x27
76 0x9b,0xc8,0x18,0xd5 = msr icc_ap0r0_el1, x27
85 0x3b,0xc8,0x1c,0xd5 = msr ich_ap0r1_el2, x27
102 0xdb,0xcc,0x1c,0xd5 = msr ich_lr6_el2, x27
111 0xfb,0xcd,0x1c,0xd5 = msr ich_lr15_el2, x27
|
| D | trace-regs.s.cs | 9 0xfb,0x08,0x31,0xd5 = mrs x27, trcidr0
55 0x5b,0x08,0x31,0xd5 = mrs x27, trcvdctlr
177 0xbb,0x28,0x31,0xd5 = mrs x27, trcdvcvr6
200 0x3b,0x3a,0x31,0xd5 = mrs x27, trcvmidcvr5
213 0x1b,0x02,0x11,0xd5 = msr trcprocselr, x27
217 0x1b,0x09,0x11,0xd5 = msr trceventctl1r, x27
247 0xbb,0x09,0x11,0xd5 = msr trccntvr1, x27
251 0xfb,0x01,0x11,0xd5 = msr trcimspec1, x27
257 0xfb,0x07,0x11,0xd5 = msr trcimspec7, x27
289 0x5b,0x11,0x11,0xd5 = msr trcssccr1, x27
[all …]
|
| /external/llvm/test/MC/AArch64/ |
| D | gicv3-regs.s | 25 mrs x27, icc_ap0r2_el1
30 mrs x27, icc_ap1r3_el1
37 mrs x27, ich_ap1r2_el2
40 mrs x27, ich_misr_el2
116 msr icc_eoir1_el1, x27
134 msr icc_ap0r0_el1, x27
143 msr ich_ap0r1_el2, x27
160 msr ich_lr6_el2, x27
169 msr ich_lr15_el2, x27
|
| D | trace-regs.s | 10 mrs x27, trcidr0
56 mrs x27, trcvdctlr
178 mrs x27, trcdvcvr6
201 mrs x27, trcvmidcvr5
423 msr trcprocselr, x27
427 msr trceventctl1r, x27
457 msr trccntvr1, x27
461 msr trcimspec1, x27
467 msr trcimspec7, x27
499 msr trcssccr1, x27
[all …]
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AArch64/ |
| D | machine-outliner-inline-asm-adrp.mir | 29 liveins: $x27, $lr
30 $x27 = ADRP target-flags(aarch64-page, aarch64-got) @g
41 liveins: $x27, $lr
42 $x27 = ADRP target-flags(aarch64-page, aarch64-got) @g
53 liveins: $x27, $lr
54 $x27 = ADRP target-flags(aarch64-page, aarch64-got) @g
|
| D | arm64-register-pairing.ll | 12 ; CHECK: stp x28, x27, [sp, #64]
22 ; CHECK: ldp x28, x27, [sp, #64]
31 ; CHECK-NOTMACHO: str x27, [sp, #32]
37 ; CHECK-NOTMACHO: ldr x27, [sp, #32]
40 …call void asm sideeffect "mov x0, #42", "~{x0},~{x19},~{x21},~{x23},~{x25},~{x27},~{d8},~{d10},~{d…
50 ; CHECK: stp x28, x27, [sp, #64]
60 ; CHECK: ldp x28, x27, [sp, #64]
|
| /external/python/cpython2/Demo/tix/bitmaps/ |
| D | filebox.xbm | 6 0xe4, 0xff, 0xff, 0x27, 0x24, 0x00, 0x00, 0x24, 0x24, 0x00, 0x00, 0x24,
7 0xe4, 0xff, 0xff, 0x27, 0x04, 0x00, 0x00, 0x20, 0xe4, 0x7f, 0xfe, 0x27,
10 0x24, 0x50, 0x02, 0x25, 0xe4, 0x7f, 0xfe, 0x27, 0x04, 0x00, 0x00, 0x20,
11 0xe4, 0xff, 0xff, 0x27, 0x24, 0x00, 0x00, 0x24, 0x24, 0x00, 0x00, 0x24,
12 0xe4, 0xff, 0xff, 0x27, 0x04, 0x00, 0x00, 0x20, 0xfc, 0xff, 0xff, 0x3f,
|
| /external/llvm/test/CodeGen/AArch64/ |
| D | arm64-register-pairing.ll | 12 ; CHECK: stp x28, x27, [sp, #64]
22 ; CHECK: ldp x28, x27, [sp, #64]
31 ; CHECK-NOTMACHO: str x27, [sp, #32]
37 ; CHECK-NOTMACHO: ldr x27, [sp, #32]
40 …call void asm sideeffect "mov x0, #42", "~{x0},~{x19},~{x21},~{x23},~{x25},~{x27},~{d8},~{d10},~{d…
50 ; CHECK: stp x28, x27, [sp, #64]
60 ; CHECK: ldp x28, x27, [sp, #64]
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/ARC/ |
| D | alu.txt | 19 0x00 0x27 0x02 0x01
22 0x04 0x27 0x02 0x01
25 0x04 0x27 0x02 0x81
28 0x44 0x27 0x02 0x01
88 0x02 0x27 0x02 0x01
91 0x02 0x27 0x02 0x81
|
| /external/epid-sdk/epid/common-testhelper/testdata/grp_y/cmember9/ |
| D | cmpprivkey.inc | 27 0x27, 0x8d, 0x99, 0x27, 0x35, 0x78, 0x6d, 0xf6,
33 0x21, 0x27, 0x66, 0xa2, 0x05, 0x97, 0xb7, 0x8d,
34 0x27, 0xd8, 0x9d, 0xca, 0x37, 0x7d, 0x77, 0x30
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/X86/ |
| D | avx512vl-arith.ll | 79 ; CHECK-NEXT: vptestmd %ymm2, %ymm2, %k1 ## encoding: [0x62,0xf2,0x6d,0x28,0x27,0xca]
91 ; CHECK-NEXT: vptestmd %ymm2, %ymm2, %k1 ## encoding: [0x62,0xf2,0x6d,0x28,0x27,0xca]
103 ; CHECK-NEXT: vptestmd %ymm1, %ymm1, %k1 ## encoding: [0x62,0xf2,0x75,0x28,0x27,0xc9]
116 ; CHECK-NEXT: vptestmd %ymm1, %ymm1, %k1 ## encoding: [0x62,0xf2,0x75,0x28,0x27,0xc9]
129 ; CHECK-NEXT: vptestmd %ymm1, %ymm1, %k1 ## encoding: [0x62,0xf2,0x75,0x28,0x27,0xc9]
142 ; CHECK-NEXT: vptestmd %ymm1, %ymm1, %k1 ## encoding: [0x62,0xf2,0x75,0x28,0x27,0xc9]
213 ; CHECK-NEXT: vptestmd %ymm3, %ymm3, %k1 ## encoding: [0x62,0xf2,0x65,0x28,0x27,0xcb]
225 ; CHECK-NEXT: vptestmd %ymm3, %ymm3, %k1 ## encoding: [0x62,0xf2,0x65,0x28,0x27,0xcb]
237 ; CHECK-NEXT: vptestmd %ymm3, %ymm3, %k1 ## encoding: [0x62,0xf2,0x65,0x28,0x27,0xcb]
250 ; CHECK-NEXT: vptestmd %ymm3, %ymm3, %k1 ## encoding: [0x62,0xf2,0x65,0x28,0x27,0xcb]
[all …]
|
| /external/llvm/test/MC/Disassembler/PowerPC/ |
| D | ppc64-encoding-vmx.txt | 103 0x10 0x43 0x27 0x8c
232 0x10 0x43 0x27 0x00
235 0x10 0x43 0x27 0x40
238 0x10 0x43 0x27 0x80
340 0x10 0x43 0x27 0x88
346 0x10 0x43 0x27 0x08
448 0x10 0x43 0x27 0x06
454 0x10 0x43 0x27 0x46
460 0x10 0x43 0x27 0x86
466 0x10 0x43 0x27 0xc7
[all …]
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/PowerPC/ |
| D | ppc64-encoding-vmx.txt | 103 0x10 0x43 0x27 0x8c
232 0x10 0x43 0x27 0x00
235 0x10 0x43 0x27 0x40
238 0x10 0x43 0x27 0x80
340 0x10 0x43 0x27 0x88
346 0x10 0x43 0x27 0x08
448 0x10 0x43 0x27 0x06
454 0x10 0x43 0x27 0x46
460 0x10 0x43 0x27 0x86
466 0x10 0x43 0x27 0xc7
[all …]
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/PowerPC/ |
| D | scavenging.mir | 34 $x27 = IMPLICIT_DEF
45 ; CHECK-NOT: $x27 = LI 42
64 NOP implicit $x27
106 $x27 = IMPLICIT_DEF
145 NOP implicit $x27
169 …, $x15, $x16, $x17, $x18, $x19, $x20, $x21, $x22, $x23, $x24, $x25, $x26, $x27, $x28, $x29, $x30, …
201 NOP implicit $x27
|
| /external/llvm/test/MC/Disassembler/AArch64/ |
| D | gicv3-regs.txt | 49 # CHECK: mrs x27, {{icc_ap0r2_el1|ICC_AP0R2_EL1}}
59 # CHECK: mrs x27, {{icc_ap1r3_el1|ICC_AP1R3_EL1}}
73 # CHECK: mrs x27, {{ich_ap1r2_el2|ICH_AP1R2_EL2}}
79 # CHECK: mrs x27, {{ich_misr_el2|ICH_MISR_EL2}}
117 # CHECK: msr {{icc_eoir1_el1|ICC_EOIR1_EL1}}, x27
153 # CHECK: msr {{icc_ap0r0_el1|ICC_AP0R0_EL1}}, x27
171 # CHECK: msr {{ich_ap0r1_el2|ICH_AP0R1_EL2}}, x27
205 # CHECK: msr {{ich_lr6_el2|ICH_LR6_EL2}}, x27
223 # CHECK: msr {{ich_lr15_el2|ICH_LR15_EL2}}, x27
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/AArch64/ |
| D | gicv3-regs.txt | 49 # CHECK: mrs x27, {{icc_ap0r2_el1|ICC_AP0R2_EL1}}
59 # CHECK: mrs x27, {{icc_ap1r3_el1|ICC_AP1R3_EL1}}
73 # CHECK: mrs x27, {{ich_ap1r2_el2|ICH_AP1R2_EL2}}
79 # CHECK: mrs x27, {{ich_misr_el2|ICH_MISR_EL2}}
117 # CHECK: msr {{icc_eoir1_el1|ICC_EOIR1_EL1}}, x27
153 # CHECK: msr {{icc_ap0r0_el1|ICC_AP0R0_EL1}}, x27
171 # CHECK: msr {{ich_ap0r1_el2|ICH_AP0R1_EL2}}, x27
205 # CHECK: msr {{ich_lr6_el2|ICH_LR6_EL2}}, x27
223 # CHECK: msr {{ich_lr15_el2|ICH_LR15_EL2}}, x27
|
| /external/icu/icu4c/source/data/mappings/ |
| D | ibm-5478_P100-1995.ucm | 29 <U00A8> \x21\x27 |0
32 <U00B4> \x23\x27 |0
49 <U011B> \x28\x27 |0
69 <U0397> \x26\x27 |0
111 <U0401> \x27\x27 |0
112 <U0410> \x27\x21 |0
113 <U0411> \x27\x22 |0
114 <U0412> \x27\x23 |0
115 <U0413> \x27\x24 |0
116 <U0414> \x27\x25 |0
[all …]
|
| D | icu-internal-25546.ucm | 77 <U0027> \x27 |0
206 <U00A8> \x21\x27 |0
300 <U0138> \x29\x27 |0
312 <U02C7> \x22\x27 |0
368 <U0401> \x2C\x27 |0
457 <U2113> \x27\x24 |0
461 <U2126> \x27\x59 |0
485 <U2176> \x25\x27 |0
639 <U251C> \x26\x27 |0
757 <U3047> \x2A\x27 |0
[all …]
|
| /external/e2fsprogs/po/ |
| D | en@quot.header | 3 # characters, only substitutes like grave accent (0x60), apostrophe (0x27)
7 # This catalog translates grave accent (0x60) and apostrophe (0x27) to
9 # It also translates pairs of apostrophe (0x27) to
|