/external/llvm/test/MC/Disassembler/ARM/ |
D | thumb-v8.1a.txt | 52 [0x91,0xef,0x42,0x0e] 55 # CHECK-V8: [0x91,0xef,0x42,0x0e] 58 [0xa1,0xef,0x42,0x0e] 61 # CHECK-V8: [0xa1,0xef,0x42,0x0e] 64 [0x92,0xff,0x42,0x0e] 67 # CHECK-V8: [0x92,0xff,0x42,0x0e] 70 [0xa2,0xff,0x42,0x0e] 73 # CHECK-V8: [0xa2,0xff,0x42,0x0e] 76 [0x91,0xef,0x42,0x0f] 79 # CHECK-V8: [0x91,0xef,0x42,0x0f] [all …]
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D | invalid-armv8.1a.txt | 44 [0x42,0x0e,0x81,0xf2] # vqrdmlah.s8 d0, d1, d2[0] 46 # CHECK-NEXT: [0x42,0x0e,0x81,0xf2] # vqrdmlah.s8 d0, d1, d2[0] 49 [0x42,0x0e,0xb1,0xf2] # vqrdmlah.s64 d0, d1, d2[0] 51 # CHECK-NEXT: [0x42,0x0e,0xb1,0xf2] # vqrdmlah.s64 d0, d1, d2[0] 54 [0x42,0x0e,0x82,0xf3] # vqrdmlah.s8 q0, q1, d2[0] 56 # CHECK-NEXT: [0x42,0x0e,0x82,0xf3] # vqrdmlah.s8 q0, q1, d2[0] 59 [0x42,0x0e,0xb2,0xf3] # vqrdmlah.s64 q0, q1, d2[0] 61 # CHECK-NEXT: [0x42,0x0e,0xb2,0xf3] # vqrdmlah.s64 q0, q1, d2[0] 65 [0x42,0x0f,0x81,0xf2] # vqrdmlsh.s8 d0, d1, d2[0] 67 # CHECK-NEXT: [0x42,0x0f,0x81,0xf2] # vqrdmlsh.s8 d0, d1, d2[0] [all …]
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D | invalid-thumbv8.1a.txt | 39 [0x81,0xef,0x42,0x0e] # vqrdmlah.s8 d0, d1, d2[0] 40 [0xb1,0xef,0x42,0x0e] # vqrdmlah.s64 d0, d1, d2[0] 41 [0x82,0xff,0x42,0x0e] # vqrdmlah.s8 q0, q1, d2[0] 42 [0xb2,0xff,0x42,0x0e] # vqrdmlah.s64 q0, q1, d2[0] 44 [0x81,0xef,0x42,0x0f] # vqrdmlsh.s8 d0, d1, d2[0] 45 [0xb1,0xef,0x42,0x0f] # vqrdmlsh.s64 d0, d1, d2[0] 46 [0x82,0xff,0x42,0x0f] # vqrdmlsh.s8 q0, q1, d2[0] 47 [0xb2,0xff,0x42,0x0f] # vqrdmlsh.s64 q0, q1, d2[0] 50 # CHECK-NEXT: [0x81,0xef,0x42,0x0e] # vqrdmlah.s8 d0, d1, d2[0] 53 # CHECK-NEXT: [0xb1,0xef,0x42,0x0e] # vqrdmlah.s64 d0, d1, d2[0] [all …]
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D | crc32.txt | 10 0x42 0x00 0x01 0xe1 11 0x42 0x00 0x21 0xe1 12 0x42 0x00 0x41 0xe1 13 0x42 0x02 0x01 0xe1 14 0x42 0x02 0x21 0xe1 15 0x42 0x02 0x41 0xe1
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D | armv8.1a.txt | 21 [0x42,0x0e,0x92,0xf3] 22 [0x42,0x0e,0xa1,0xf2] 23 [0x42,0x0f,0x92,0xf3] 24 [0x42,0x0f,0xa1,0xf2] 30 # CHECK-V8: [0x42,0x0e,0x92,0xf3] 32 # CHECK-V8: [0x42,0x0e,0xa1,0xf2] 34 # CHECK-V8: [0x42,0x0f,0x92,0xf3] 36 # CHECK-V8: [0x42,0x0f,0xa1,0xf2]
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D | basic-arm-instructions.txt | 152 0x86 0x42 0x85 0xe0 153 0xa6 0x42 0x85 0xe0 154 0xa6 0x42 0x85 0xe0 155 0xc6 0x42 0x85 0xe0 156 0xe6 0x42 0x85 0xe0 166 0x85 0x42 0x84 0xe0 167 0xa5 0x42 0x84 0xe0 168 0xa5 0x42 0x84 0xe0 169 0xc5 0x42 0x84 0xe0 170 0xe5 0x42 0x84 0xe0 [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/ARM/ |
D | thumb-v8.1a.txt | 52 [0x91,0xef,0x42,0x0e] 55 # CHECK-V8: [0x91,0xef,0x42,0x0e] 58 [0xa1,0xef,0x42,0x0e] 61 # CHECK-V8: [0xa1,0xef,0x42,0x0e] 64 [0x92,0xff,0x42,0x0e] 67 # CHECK-V8: [0x92,0xff,0x42,0x0e] 70 [0xa2,0xff,0x42,0x0e] 73 # CHECK-V8: [0xa2,0xff,0x42,0x0e] 76 [0x91,0xef,0x42,0x0f] 79 # CHECK-V8: [0x91,0xef,0x42,0x0f] [all …]
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D | invalid-armv8.1a.txt | 44 [0x42,0x0e,0x81,0xf2] # vqrdmlah.s8 d0, d1, d2[0] 46 # CHECK-NEXT: [0x42,0x0e,0x81,0xf2] # vqrdmlah.s8 d0, d1, d2[0] 49 [0x42,0x0e,0xb1,0xf2] # vqrdmlah.s64 d0, d1, d2[0] 51 # CHECK-NEXT: [0x42,0x0e,0xb1,0xf2] # vqrdmlah.s64 d0, d1, d2[0] 54 [0x42,0x0e,0x82,0xf3] # vqrdmlah.s8 q0, q1, d2[0] 56 # CHECK-NEXT: [0x42,0x0e,0x82,0xf3] # vqrdmlah.s8 q0, q1, d2[0] 59 [0x42,0x0e,0xb2,0xf3] # vqrdmlah.s64 q0, q1, d2[0] 61 # CHECK-NEXT: [0x42,0x0e,0xb2,0xf3] # vqrdmlah.s64 q0, q1, d2[0] 65 [0x42,0x0f,0x81,0xf2] # vqrdmlsh.s8 d0, d1, d2[0] 67 # CHECK-NEXT: [0x42,0x0f,0x81,0xf2] # vqrdmlsh.s8 d0, d1, d2[0] [all …]
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D | invalid-thumbv8.1a.txt | 39 [0x81,0xef,0x42,0x0e] # vqrdmlah.s8 d0, d1, d2[0] 40 [0xb1,0xef,0x42,0x0e] # vqrdmlah.s64 d0, d1, d2[0] 41 [0x82,0xff,0x42,0x0e] # vqrdmlah.s8 q0, q1, d2[0] 42 [0xb2,0xff,0x42,0x0e] # vqrdmlah.s64 q0, q1, d2[0] 44 [0x81,0xef,0x42,0x0f] # vqrdmlsh.s8 d0, d1, d2[0] 45 [0xb1,0xef,0x42,0x0f] # vqrdmlsh.s64 d0, d1, d2[0] 46 [0x82,0xff,0x42,0x0f] # vqrdmlsh.s8 q0, q1, d2[0] 47 [0xb2,0xff,0x42,0x0f] # vqrdmlsh.s64 q0, q1, d2[0] 50 # CHECK-NEXT: [0x81,0xef,0x42,0x0e] # vqrdmlah.s8 d0, d1, d2[0] 53 # CHECK-NEXT: [0xb1,0xef,0x42,0x0e] # vqrdmlah.s64 d0, d1, d2[0] [all …]
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D | crc32.txt | 10 0x42 0x00 0x01 0xe1 11 0x42 0x00 0x21 0xe1 12 0x42 0x00 0x41 0xe1 13 0x42 0x02 0x01 0xe1 14 0x42 0x02 0x21 0xe1 15 0x42 0x02 0x41 0xe1
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D | armv8.1a.txt | 21 [0x42,0x0e,0x92,0xf3] 22 [0x42,0x0e,0xa1,0xf2] 23 [0x42,0x0f,0x92,0xf3] 24 [0x42,0x0f,0xa1,0xf2] 30 # CHECK-V8: [0x42,0x0e,0x92,0xf3] 32 # CHECK-V8: [0x42,0x0e,0xa1,0xf2] 34 # CHECK-V8: [0x42,0x0f,0x92,0xf3] 36 # CHECK-V8: [0x42,0x0f,0xa1,0xf2]
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D | basic-arm-instructions.txt | 152 0x86 0x42 0x85 0xe0 153 0xa6 0x42 0x85 0xe0 154 0xa6 0x42 0x85 0xe0 155 0xc6 0x42 0x85 0xe0 156 0xe6 0x42 0x85 0xe0 166 0x85 0x42 0x84 0xe0 167 0xa5 0x42 0x84 0xe0 168 0xa5 0x42 0x84 0xe0 169 0xc5 0x42 0x84 0xe0 170 0xe5 0x42 0x84 0xe0 [all …]
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/external/tcpdump/tests/ |
D | medsa-e.out | 1 … untagged, dev.port:vlan 0.2:0, BDPU, pri 7: LLC, dsap STP (0x42) Individual, ssap STP (0x42) Comm… 4 … untagged, dev.port:vlan 0.2:0, BDPU, pri 7: LLC, dsap STP (0x42) Individual, ssap STP (0x42) Comm… 5 … untagged, dev.port:vlan 0.2:0, BDPU, pri 7: LLC, dsap STP (0x42) Individual, ssap STP (0x42) Comm… 10 … untagged, dev.port:vlan 0.2:0, BDPU, pri 7: LLC, dsap STP (0x42) Individual, ssap STP (0x42) Comm… 13 … untagged, dev.port:vlan 0.2:0, BDPU, pri 7: LLC, dsap STP (0x42) Individual, ssap STP (0x42) Comm… 14 … untagged, dev.port:vlan 0.2:0, BDPU, pri 7: LLC, dsap STP (0x42) Individual, ssap STP (0x42) Comm… 17 … untagged, dev.port:vlan 0.2:0, BDPU, pri 7: LLC, dsap STP (0x42) Individual, ssap STP (0x42) Comm… 18 … untagged, dev.port:vlan 0.2:0, BDPU, pri 7: LLC, dsap STP (0x42) Individual, ssap STP (0x42) Comm…
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/Mips/virt/ |
D | valid-32-el.txt | 12 0x28 0x00 0x00 0x42 # CHECK: hypcall 13 0x28 0x50 0x00 0x42 # CHECK: hypcall 10 14 0x0b 0x00 0x00 0x42 # CHECK: tlbginv 15 0x0c 0x00 0x00 0x42 # CHECK: tlbginvf 16 0x10 0x00 0x00 0x42 # CHECK: tlbgp 17 0x09 0x00 0x00 0x42 # CHECK: tlbgr 18 0x0a 0x00 0x00 0x42 # CHECK: tlbgwi 19 0x0e 0x00 0x00 0x42 # CHECK: tlbgwr
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D | valid-32.txt | 12 0x42 0x00 0x00 0x28 # CHECK: hypcall 13 0x42 0x00 0x50 0x28 # CHECK: hypcall 10 14 0x42 0x00 0x00 0x0b # CHECK: tlbginv 15 0x42 0x00 0x00 0x0c # CHECK: tlbginvf 16 0x42 0x00 0x00 0x10 # CHECK: tlbgp 17 0x42 0x00 0x00 0x09 # CHECK: tlbgr 18 0x42 0x00 0x00 0x0a # CHECK: tlbgwi 19 0x42 0x00 0x00 0x0e # CHECK: tlbgwr
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/AMDGPU/ |
D | smem_gfx9.txt | 22 # GFX9: s_scratch_store_dword s101, s[4:5], s0 ; encoding: [0x42,0x19,0x54,0xc0,0x00,0x00,0x00,0x00] 23 0x42,0x19,0x54,0xc0,0x00,0x00,0x00,0x00 25 # GFX9: s_scratch_store_dword s1, s[4:5], 0x123 glc ; encoding: [0x42,0x00,0x57,0xc0,0x23,0x01,0x00… 26 0x42,0x00,0x57,0xc0,0x23,0x01,0x00,0x00 84 # GFX9: s_atomic_dec s5, s[4:5], s0 ; encoding: [0x42,0x01,0x30,0xc2,0x00,0x00,0x00,0x00] 85 0x42,0x01,0x30,0xc2,0x00,0x00,0x00,0x00 126 # GFX9: s_atomic_umax s5, s[4:5], s0 ; encoding: [0x42,0x01,0x1c,0xc2,0x00,0x00,0x00,0x00] 127 0x42,0x01,0x1c,0xc2,0x00,0x00,0x00,0x00 148 # GFX9: s_buffer_atomic_add s5, s[4:7], 0x0 ; encoding: [0x42,0x01,0x0a,0xc1,0x00,0x00,0x00,0x00] 149 0x42,0x01,0x0a,0xc1,0x00,0x00,0x00,0x00 [all …]
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/external/swiftshader/third_party/LLVM/test/MC/Disassembler/ARM/ |
D | basic-arm-instructions.txt | 142 0x86 0x42 0x85 0xe0 143 0xa6 0x42 0x85 0xe0 144 0xa6 0x42 0x85 0xe0 145 0xc6 0x42 0x85 0xe0 146 0xe6 0x42 0x85 0xe0 156 0x85 0x42 0x84 0xe0 157 0xa5 0x42 0x84 0xe0 158 0xa5 0x42 0x84 0xe0 159 0xc5 0x42 0x84 0xe0 160 0xe5 0x42 0x84 0xe0 [all …]
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/external/bouncycastle/repackaged/bcprov/src/main/java/com/android/org/bouncycastle/math/ec/custom/sec/ |
D | SecP224K1FieldElement.java | 179 int[] x42 = x4; in sqrt() local 180 SecP224K1Field.squareN(x23, 19, x42); in sqrt() 181 SecP224K1Field.multiply(x42, x19, x42); in sqrt() 183 SecP224K1Field.squareN(x42, 42, x84); in sqrt() 184 SecP224K1Field.multiply(x84, x42, x84); in sqrt() 185 int[] x107 = x42; in sqrt()
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/external/bouncycastle/bcprov/src/main/java/org/bouncycastle/math/ec/custom/sec/ |
D | SecP224K1FieldElement.java | 175 int[] x42 = x4; in sqrt() local 176 SecP224K1Field.squareN(x23, 19, x42); in sqrt() 177 SecP224K1Field.multiply(x42, x19, x42); in sqrt() 179 SecP224K1Field.squareN(x42, 42, x84); in sqrt() 180 SecP224K1Field.multiply(x84, x42, x84); in sqrt() 181 int[] x107 = x42; in sqrt()
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/external/llvm/test/MC/Disassembler/Hexagon/ |
D | nv_j.txt | 11 0x11 0x40 0x71 0x70 0x92 0xd5 0x42 0x20 14 0x11 0x40 0x71 0x70 0x92 0xf5 0x42 0x20 35 0x11 0x40 0x71 0x70 0x92 0xd5 0x42 0x21 38 0x11 0x40 0x71 0x70 0x92 0xf5 0x42 0x21 59 0x11 0x40 0x71 0x70 0x92 0xd5 0x42 0x22 62 0x11 0x40 0x71 0x70 0x92 0xf5 0x42 0x22 71 0x11 0x40 0x71 0x70 0x92 0xd5 0x42 0x24 74 0x11 0x40 0x71 0x70 0x92 0xf5 0x42 0x24 95 0x11 0x40 0x71 0x70 0x92 0xd5 0x42 0x25 98 0x11 0x40 0x71 0x70 0x92 0xf5 0x42 0x25 [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/Hexagon/ |
D | nv_j.txt | 11 0x11 0x40 0x71 0x70 0x92 0xd5 0x42 0x20 14 0x11 0x40 0x71 0x70 0x92 0xf5 0x42 0x20 35 0x11 0x40 0x71 0x70 0x92 0xd5 0x42 0x21 38 0x11 0x40 0x71 0x70 0x92 0xf5 0x42 0x21 59 0x11 0x40 0x71 0x70 0x92 0xd5 0x42 0x22 62 0x11 0x40 0x71 0x70 0x92 0xf5 0x42 0x22 71 0x11 0x40 0x71 0x70 0x92 0xd5 0x42 0x24 74 0x11 0x40 0x71 0x70 0x92 0xf5 0x42 0x24 95 0x11 0x40 0x71 0x70 0x92 0xd5 0x42 0x25 98 0x11 0x40 0x71 0x70 0x92 0xf5 0x42 0x25 [all …]
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/external/icu/icu4c/source/data/mappings/ |
D | jisx-212.ucm | 41 <U00A1> \x22\x42 |0 65 <U00CE> \x2A\x42 |0 95 <U00EE> \x2B\x42 |0 129 <U0111> \x29\x42 |0 278 <U0402> \x27\x42 |0 339 <U4EB9> \x30\x42 |0 433 <U4FE0> \x31\x42 |0 527 <U50E8> \x32\x42 |0 621 <U5258> \x33\x42 |0 715 <U537E> \x34\x42 |0 [all …]
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/external/llvm/test/MC/Disassembler/PowerPC/ |
D | ppc64-encoding-bookIII.txt | 19 0x7c 0x90 0x42 0xa6 22 0x7c 0x91 0x42 0xa6 25 0x7c 0x92 0x42 0xa6 28 0x7c 0x93 0x42 0xa6 64 0x7c 0x9f 0x42 0xa6
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/external/llvm/test/MC/Disassembler/AArch64/ |
D | armv8.1a-pan.txt | 5 0x9f,0x42,0x00,0xd5 6 0x65,0x42,0x18,0xd5 7 0x6d,0x42,0x38,0xd5
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/AArch64/ |
D | armv8.1a-pan.txt | 5 0x9f,0x42,0x00,0xd5 6 0x65,0x42,0x18,0xd5 7 0x6d,0x42,0x38,0xd5
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