| /external/llvm/test/CodeGen/X86/ |
| D | 2007-11-03-x86-64-q-constraint.ll | 7 …%tmp9 = call i64 asm sideeffect "xchgb ${0:b},$1", "=q,*m,0,~{dirflag},~{fpsr},~{flags},~{memory}"…
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| D | 2009-04-13-2AddrAssert.ll | 12 …%0 = tail call i16 asm "xchgb ${0:h}, ${0:b}","=Q,0,~{dirflag},~{fpsr},~{flags}"(i16 %conv) nounwi…
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| D | atomic8.ll | 267 ; X64: xchgb
269 ; X32: xchgb
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| D | 2009-07-06-TwoAddrAssert.ll | 129 …%0 = call i16 asm "xchgb ${0:h}, ${0:b}", "=Q,0,~{dirflag},~{fpsr},~{flags}"(i16 %conv2.i) nounwin…
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| /external/swiftshader/third_party/LLVM/test/CodeGen/X86/ |
| D | 2007-11-03-x86-64-q-constraint.ll | 7 …%tmp9 = call i64 asm sideeffect "xchgb ${0:b},$1", "=q,*m,0,~{dirflag},~{fpsr},~{flags},~{memory}"…
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| D | 2009-04-13-2AddrAssert.ll | 12 …%0 = tail call i16 asm "xchgb ${0:h}, ${0:b}","=Q,0,~{dirflag},~{fpsr},~{flags}"(i16 %conv) nounwi…
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| D | 2009-07-06-TwoAddrAssert.ll | 129 …%0 = call i16 asm "xchgb ${0:h}, ${0:b}", "=Q,0,~{dirflag},~{fpsr},~{flags}"(i16 %conv2.i) nounwin…
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/X86/ |
| D | 2007-11-03-x86-64-q-constraint.ll | 7 …%tmp9 = call i64 asm sideeffect "xchgb ${0:b},$1", "=q,*m,0,~{dirflag},~{fpsr},~{flags},~{memory}"…
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| D | 2009-04-13-2AddrAssert.ll | 12 …%0 = tail call i16 asm "xchgb ${0:h}, ${0:b}","=Q,0,~{dirflag},~{fpsr},~{flags}"(i16 %conv) nounwi…
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| D | atomic8.ll | 267 ; X64: xchgb
269 ; X32: xchgb
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| D | xchg-nofold.ll | 24 ; CHECK-NEXT: xchgb %al, (%rdi)
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| D | 2009-07-06-TwoAddrAssert.ll | 129 …%0 = call i16 asm "xchgb ${0:h}, ${0:b}", "=Q,0,~{dirflag},~{fpsr},~{flags}"(i16 %conv2.i) nounwin…
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| D | schedule-x86_64.ll | 16148 ; GENERIC-NEXT: xchgb %sil, %dil # sched: [2:1.00]
16149 ; GENERIC-NEXT: xchgb %dil, (%rdx) # sched: [6:1.00]
16156 ; ATOM-NEXT: xchgb %sil, %dil # sched: [2:1.00]
16157 ; ATOM-NEXT: xchgb %dil, (%rdx) # sched: [3:1.50]
16164 ; SLM-NEXT: xchgb %sil, %dil # sched: [1:0.50]
16165 ; SLM-NEXT: xchgb %dil, (%rdx) # sched: [4:2.00]
16172 ; SANDY-NEXT: xchgb %sil, %dil # sched: [2:1.00]
16173 ; SANDY-NEXT: xchgb %dil, (%rdx) # sched: [6:1.00]
16180 ; HASWELL-NEXT: xchgb %sil, %dil # sched: [2:0.75]
16181 ; HASWELL-NEXT: xchgb %dil, (%rdx) # sched: [9:1.00]
[all …]
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/X86/ |
| D | I86-64.s | 4553 xchgb %r14b, 485498096 label
4557 xchgb %r14b, 64(%rdx) label
4561 xchgb %r14b, 64(%rdx,%rax,4) label
4565 xchgb %r14b, -64(%rdx,%rax,4) label
4569 xchgb %r14b, 64(%rdx,%rax) label
4573 xchgb %r14b, %r14b label
4577 xchgb %r14b, (%rdx) label
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| /external/v8/src/compiler/x64/ |
| D | code-generator-x64.cc | 2663 __ xchgb(i.InputRegister(0), i.MemoryOperand(1)); in AssembleArchInstruction() local
2668 __ xchgb(i.InputRegister(0), i.MemoryOperand(1)); in AssembleArchInstruction() local
2742 __ xchgb(i.InputRegister(0), i.MemoryOperand(1)); in AssembleArchInstruction() local
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| /external/mesa3d/src/mesa/x86/ |
| D | assyntax.h | 679 #define XCHG_B(a, b) CHOICE(xchgb ARG2(a,b), xchgb ARG2(a,b), xchgb ARG2(b,a))
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| /external/v8/src/x64/ |
| D | assembler-x64.h | 775 void xchgb(Register reg, Operand op);
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| D | assembler-x64.cc | 2273 void Assembler::xchgb(Register reg, Operand op) { in xchgb() function in v8::internal::Assembler
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| /external/swiftshader/third_party/LLVM/lib/Target/X86/ |
| D | X86GenAsmMatcher.inc | 6091 { X86::XCHG8rr, "xchgb", Convert__Reg1_0__Tie0__Reg1_1, { MCK_GR8, MCK_GR8 }, 0},
6092 { X86::XCHG8rm, "xchgb", Convert__Reg1_0__Tie0__Mem5_1, { MCK_GR8, MCK_Mem }, 0},
6093 { X86::XCHG8rm, "xchgb", Convert__Reg1_1__Tie0__Mem5_0, { MCK_Mem, MCK_GR8 }, 0},
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| D | X86InstrInfo.td | 1791 def : InstAlias<"xchgb $mem, $val", (XCHG8rm GR8 :$val, i8mem :$mem)>;
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| D | X86GenAsmWriter.inc | 4073 "xaddb\t\000xchgw\t\000xchgl\t\000xchgq\t\000xchgb\t\000fxch\t\000xcrypt"
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| /external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/X86/ |
| D | X86GenAsmMatcher.inc | 6820 "dl\005xaddq\005xaddw\006xbegin\004xchg\005xchgb\005xchgl\005xchgq\005xc"
21343 …{ 16029 /* xchgb */, X86::XCHG8rr, Convert__Reg1_1__Reg1_0__Tie0_2_2__Tie1_1_1, 0, { MCK_GR8, MCK_…
21344 …{ 16029 /* xchgb */, X86::XCHG8rm, Convert__Reg1_0__Tie0_1_1__Mem85_1, 0, { MCK_GR8, MCK_Mem8 }, },
21345 …{ 16029 /* xchgb */, X86::XCHG8rm, Convert__Reg1_1__Tie0_2_2__Mem85_0, 0, { MCK_Mem8, MCK_GR8 }, },
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