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Searched refs:xreg (Results 1 – 8 of 8) sorted by relevance

/external/u-boot/arch/arm/include/asm/
Dmacro.h70 .macro switch_el, xreg, el3_label, el2_label, el1_label
71 mrs \xreg, CurrentEL
72 cmp \xreg, 0xc
74 cmp \xreg, 0x8
76 cmp \xreg, 0x4
83 .macro branch_if_a57_core, xreg, a57_label
84 mrs \xreg, midr_el1
85 lsr \xreg, \xreg, #4
86 and \xreg, \xreg, #0x00000FFF
87 cmp \xreg, #0xD07 /* Cortex-A57 MPCore processor. */
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/external/vixl/test/aarch64/examples/
Dtest-examples.cc199 VIXL_CHECK(static_cast<uint64_t>(regs.xreg(0)) == FactorialC(N)); \
224 VIXL_CHECK(static_cast<uint64_t>(regs.xreg(0)) == FactorialC(N)); \
407 VIXL_CHECK(regs.xreg(0) == SumArrayC(Array, ARRAY_SIZE(Array))); \
435 VIXL_CHECK(regs.xreg(0) == abs(X)); \
468 VIXL_CHECK(regs.xreg(0) == chksum); in TEST()
490 VIXL_CHECK(regs.xreg(0) == d); in TEST()
491 VIXL_CHECK(regs.xreg(1) == c); in TEST()
492 VIXL_CHECK(regs.xreg(2) == b); in TEST()
493 VIXL_CHECK(regs.xreg(3) == a); in TEST()
522 VIXL_CHECK(regs.xreg(0) == ((Low <= Value) && (Value <= High))); \
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/external/v8/src/arm64/
Dsimulator-arm64.cc179 saved_registers[i] = xreg(register_list.PopLowestIndex().code()); in CheckPCSComplianceAndRun()
195 DCHECK_EQ(saved_registers[i], xreg(register_list.PopLowestIndex().code())); in CheckPCSComplianceAndRun()
449 const int64_t arg0 = xreg(0); in DoRuntimeCall()
450 const int64_t arg1 = xreg(1); in DoRuntimeCall()
451 const int64_t arg2 = xreg(2); in DoRuntimeCall()
452 const int64_t arg3 = xreg(3); in DoRuntimeCall()
453 const int64_t arg4 = xreg(4); in DoRuntimeCall()
454 const int64_t arg5 = xreg(5); in DoRuntimeCall()
455 const int64_t arg6 = xreg(6); in DoRuntimeCall()
456 const int64_t arg7 = xreg(7); in DoRuntimeCall()
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Dsimulator-arm64.h812 int64_t xreg(unsigned code, Reg31Mode r31mode = Reg31IsZeroRegister) const {
894 int64_t sp() { return xreg(31, Reg31IsStackPointer); } in sp()
896 return xreg(kFramePointerRegCode, Reg31IsStackPointer); in fp()
2294 return ConvertReturn<T>(xreg(0)); in ReadReturn()
/external/vixl/test/aarch64/
Dtest-utils-aarch64.cc164 int64_t result_x = core->xreg(reg.GetCode()); in Equal32()
178 uint64_t result = core->xreg(reg.GetCode()); in Equal64()
243 int64_t expected = core->xreg(reg0.GetCode()); in Equal64()
244 int64_t result = core->xreg(reg1.GetCode()); in Equal64()
292 if (a->xreg(i) != b->xreg(i)) { in EqualRegisters()
295 a->xreg(i), in EqualRegisters()
296 b->xreg(i)); in EqualRegisters()
Dtest-utils-aarch64.h94 inline int64_t xreg(unsigned code) const { in xreg() function
/external/u-boot/arch/arm/cpu/armv8/fsl-layerscape/
Dlowlevel.S237 .macro tzasc_prog, xreg argument
241 mul x14, \xreg, x16
/external/vixl/src/aarch64/
Dsimulator-aarch64.h790 int64_t xreg(unsigned code,