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Searched refs:xt2 (Results 1 – 10 of 10) sorted by relevance

/external/aac/libFDK/src/arm/
Dfft_rad2_arm.cpp168 FIXP_DBL *xt2 = xt1 + (mh << 1); in dit_fft() local
176 vi = xt2[1] >> 1; in dit_fft()
177 vr = xt2[0] >> 1; in dit_fft()
185 xt2[0] = ur - vr; in dit_fft()
186 xt2[1] = ui - vi; in dit_fft()
189 xt2 += mh; in dit_fft()
192 vr = xt2[1] >> 1; in dit_fft()
193 vi = xt2[0] >> 1; in dit_fft()
201 xt2[0] = ur - vr; in dit_fft()
202 xt2[1] = ui + vi; in dit_fft()
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/external/boringssl/src/crypto/chacha/asm/
Dchacha-x86_64.pl580 my ($xd0,$xd1,$xd2,$xd3, $xt0,$xt1,$xt2,$xt3,
590 my ($xc,$xc_,$t0,$t1)=map("\"$_\"",$xt0,$xt1,$xt2,$xt3);
786 pshufd \$0xaa,$xt3,$xt2 # "$xc2"
789 movdqa $xt2,0xe0-0x100(%rcx)
815 movdqa 0xe0-0x100(%rcx),$xt2 # "$xc2"
824 movdqa $xt2,0x20(%rsp) # SIMD equivalent of "@x[10]"
845 movdqa $xa0,$xt2 # "de-interlace" data
849 punpckhdq $xa1,$xt2
853 movdqa $xt2,$xa3
854 punpcklqdq $xt3,$xt2 # "a2"
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Dchacha-x86.pl572 my ($xa0,$xa1,$xa2,$xa3,$xt0,$xt1,$xt2,$xt3)=map("xmm$_",(0..7));
585 &movdqa ($xt2,$xa0); # "de-interlace" data
589 &punpckhdq ($xt2,$xa1);
593 &movdqa ($xa3,$xt2);
594 &punpcklqdq ($xt2,$xt3); # "a2"
609 &pxor ($xt2,$xa2);
615 &movdqu (&QWP(64*2-128,$out),$xt2);
/external/mesa3d/src/mesa/drivers/dri/i965/
Dintel_tiled_memcpy.h41 linear_to_tiled(uint32_t xt1, uint32_t xt2,
50 tiled_to_linear(uint32_t xt1, uint32_t xt2,
Dintel_tiled_memcpy.c631 linear_to_tiled(uint32_t xt1, uint32_t xt2, in linear_to_tiled() argument
662 xt3 = ALIGN_UP (xt2, tw); in linear_to_tiled()
679 uint32_t x3 = MIN2(xt2, xt + tw); in linear_to_tiled()
722 tiled_to_linear(uint32_t xt1, uint32_t xt2, in tiled_to_linear() argument
753 xt3 = ALIGN_UP (xt2, tw); in tiled_to_linear()
770 uint32_t x3 = MIN2(xt2, xt + tw); in tiled_to_linear()
/external/vixl/src/aarch64/
Dassembler-aarch64.cc1092 const Register& xt2, in ldpsw() argument
1094 VIXL_ASSERT(xt.Is64Bits() && xt2.Is64Bits()); in ldpsw()
1095 LoadStorePair(xt, xt2, src, LDPSW_x); in ldpsw()
Dassembler-aarch64.h1294 void ldpsw(const Register& xt, const Register& xt2, const MemOperand& src);
/external/vixl/doc/aarch64/
Dsupported-instructions-aarch64.md568 void ldpsw(const Register& xt, const Register& xt2, const MemOperand& src)
/external/honggfuzz/examples/apache-httpd/corpus_http2/
Dbae36812036c9620701921a5df94c288.0001ed9e.honggfuzz.cov707 ��H:b`��WPr�-B� �w��xt2����1C�˅��P��|� �~���&I ���#��A�^�ۓ�bJ�J��K *2
/external/honggfuzz/examples/apache-httpd/corpus_http1/
Dbae36812036c9620701921a5df94c288.0001ed9e.honggfuzz.cov707 ��H:b`��WPr�-B� �w��xt2����1C�˅��P��|� �~���&I ���#��A�^�ۓ�bJ�J��K *2