Home
last modified time | relevance | path

Searched refs:zeroing (Results 1 – 25 of 72) sorted by relevance

123

/external/python/cpython2/Mac/Demo/applescript/Disk_Copy/
DStandard_Suite.py150 class zeroing(aetools.NProperty): class
324 'zeroing' : zeroing,
454 'PZeB' : zeroing,
/external/llvm/test/CodeGen/X86/
DTruncAssertZext.ll2 ; Checks that a zeroing mov is inserted for the trunc/zext pair even when
D2012-12-06-python27-miscompile.ll6 ; Make sure that we are zeroing one memory location at a time using xorl and
Dnontemporal-2.ll10 ; We use xorps for zeroing, so domain information isn't available anymore.
12 ; Scalar versions (zeroing means we can this even for fp types).
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/X86/
DTruncAssertSext.ll3 ; Checks that a zeroing mov is inserted for the trunc/zext pair even when
Dmerge-consecutive-stores.ll4 ; Make sure that we are zeroing one memory location at a time using xorl and
DTruncAssertZext.ll3 ; Checks that a zeroing mov is inserted for the trunc/zext pair even when
Dhoist-invariant-load.ll9 …ll divide, both loads should be hoisted.) 1 additional instruction for a zeroing edx that gets hoi…
Dnontemporal-2.ll10 ; We use xorps for zeroing, so domain information isn't available anymore.
12 ; Scalar versions (zeroing means we can this even for fp types).
/external/e2fsprogs/doc/RelNotes/
Dv1.11.txt41 Fixed bug in ext2fs_resize_generic_bitmap; it had not be zeroing all
Dv1.43.0.txt145 The mke2fs program now skips zeroing inode table blocks if they were
/external/llvm/test/CodeGen/AArch64/
Darm64-zero-cycle-zeroing.ll59 ; We used to produce spills+reloads for a Q register with zero cycle zeroing
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AArch64/
Darm64-zero-cycle-zeroing.ll65 ; We used to produce spills+reloads for a Q register with zero cycle zeroing
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/
DAArch64.td86 "Has zero-cycle zeroing instructions">;
92 "The zero-cycle floating-point zeroing instruction has a bug">;
/external/llvm/lib/Target/WebAssembly/
DREADME.txt91 WebAssembly registers are implicitly initialized to zero. Explicit zeroing is
/external/llvm/lib/Target/AArch64/
DAArch64.td53 "Has zero-cycle zeroing instructions">;
/external/harfbuzz_ng/
DNEWS822 address "regression" introduced in 1.2.0 when we switched mark zeroing
888 - Change mark zeroing types of most shapers from BY_UNICODE_LATE to
890 - Change mark zeroing of USE shaper from NONE to BY_GDEF_EARLY. That's
1191 - Fix mark advance zeroing for Hebrew shaper:
1511 - Fix regression with Arabic mark positioning / width-zeroing.
1530 - Fix Arabic mark width zeroing regression.
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/WebAssembly/
DREADME.txt128 WebAssembly registers are implicitly initialized to zero. Explicit zeroing is
/external/llvm/lib/Target/ARM/
DARM.td104 // Cyclone has preferred instructions for zeroing VFP registers, which can
107 "Has zero-cycle zeroing instructions">;
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/
DX86InstrVecCompiler.td331 // zeroing.
405 // If the bits are not zero we have to fall back to explicitly zeroing by
/external/libunwind_llvm/src/
DUnwindRegistersSave.S784 @ T1 does not have a non-cpsr-clobbering register-zeroing instruction.
/external/swiftshader/third_party/LLVM/lib/Target/X86/
DX86InstrFragmentsSIMD.td181 // These are 'extloads' from a scalar to the low element of a vector, zeroing
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/
DARM.td154 "Has zero-cycle zeroing instructions">;
/external/jemalloc/
DChangeLog95 - Fix opt_zero-triggered in-place huge reallocation zeroing. (@jasone)
745 - Fix large calloc() zeroing bugs due to dropping chunk map unzeroed flags.
/external/clang/test/CodeGenObjC/
Darc.m712 // before the zeroing of self.
758 // before the zeroing of self.

123