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/frameworks/rs/cpu_ref/
DrsCpuIntrinsics_advsimd_Blend.S94 rshrn v6.8b, v2.8h, #8
95 rshrn2 v6.16b, v14.8h, #8
103 uaddw v2.8h, v2.8h, v6.8b
104 uaddw2 v14.8h, v14.8h, v6.16b
140 rshrn v6.8b, v10.8h, #8
141 rshrn2 v6.16b, v14.8h, #8
149 uaddw v10.8h, v10.8h, v6.8b
150 uaddw2 v14.8h, v14.8h, v6.16b
184 rshrn v6.8b, v2.8h, #8
185 rshrn2 v6.16b, v14.8h, #8
[all …]
DrsCpuIntrinsics_advsimd_ColorMatrix.S77 dup v6.4s, v4.s[0]
80 vmxx_s16 \i, 1, v6.4s, v12.4h, v0.h[0]
81 vmxx_s16 \i, 2, v6.4s, v13.4h, v0.h[4]
82 vmxx_s16 \i, 4, v6.4s, v14.4h, v1.h[0]
83 vmxx_s16 \i, 8, v6.4s, v15.4h, v1.h[4]
88 sqshrun v8.4h, v6.4s, #8
94 dup v6.4s, v4.s[0]
97 vmxx_s16 \i^31, 1, v6.4s, v12.4h, v0.h[0]
98 vmxx_s16 \i^31, 2, v6.4s, v13.4h, v0.h[4]
99 vmxx_s16 \i^31, 4, v6.4s, v14.4h, v1.h[0]
[all …]
DrsCpuIntrinsics_advsimd_3DLUT.S175 ushll v6.4s, v12.4h, #2
181 mla v6.4s, v8.4s, v4.s[2]
183 mla v6.4s, v10.4s, v4.s[3]
189 …lanepair dst=v20.8b, src0=v6.s[0], src1=v6.s[1], xr0=v0.h[0], xr1=v0.h[1], yr0=v1.b[0], yr1=v1…
192 …lanepair dst=v20.16b, src0=v6.s[2], src1=v6.s[3], xr0=v0.h[2], xr1=v0.h[3], yr0=v1.b[2], yr1=v1…
200 uzp1 v6.16b, v20.16b, v21.16b
202 uzp1 v20.16b, v6.16b, v7.16b
203 uzp2 v22.16b, v6.16b, v7.16b
DrsCpuIntrinsics_advsimd_YuvToRGB.S87 add v6.8h, v5.8h, v23.8h // b0_hi = g0_hi + (u_hi << 2)
107 uhadd v6.8h, v6.8h, v15.8h // b0_hi = (b0_hi + b2_hi) >> 1
121 …uqsub v6.8h, v6.8h, v31.8h // b0_hi = satu16(b0_hi - (16 * 149 + (128 << 2) + 128 * 2…
135 uqrshrn v6.8b, v6.8h, #6
144 zip1 v6.16b, v6.16b, v22.16b
DrsCpuIntrinsics_advsimd_Blur.S376 umlal v14.4s, v6.4h, v2.h[0]
377 umlal2 v15.4s, v6.8h, v2.h[0]
380 115: ext v12.16b, v6.16b, v7.16b, #1*2
386 114: ext v12.16b, v6.16b, v7.16b, #2*2
392 113: ext v12.16b, v6.16b, v7.16b, #3*2
400 umlal2 v14.4s, v6.8h, v1.h[4]
404 111: ext v12.16b, v6.16b, v7.16b, #5*2
410 110: ext v12.16b, v6.16b, v7.16b, #6*2
416 109: ext v12.16b, v6.16b, v7.16b, #7*2
475 mov v6.16b, v7.16b
[all …]
DrsCpuIntrinsics_advsimd_Convolve.S56 uxtl v6.8h, v15.8b
78 smlal v8.4s, v6.4h, v0.h[6]
79 smlal2 v9.4s, v6.8h, v0.h[6]
80 smlal2 v8.4s, v6.8h, v0.h[7]
DrsCpuIntrinsics_advsimd_Resize.S174 dup v6.8h, w2
176 mla v6.8h, v5.8h, v7.8h // vxf
414 3: ushr v8.8h, v6.8h, #1 // sxf
454 add v6.8h, v6.8h, v7.8h
/frameworks/base/tests/net/java/com/android/server/connectivity/
DNetdEventListenerServiceTest.java92 final int v6 = 0x86dd; in testWakeupEventLogging() local
102 wakeupEvent(iface, uids[1], v6, udp, mac, srcIp6, dstIp6, sport, dport, now); in testWakeupEventLogging()
103 wakeupEvent(iface, uids[2], v6, udp, mac, srcIp6, dstIp6, sport, dport, now); in testWakeupEventLogging()
105 wakeupEvent(iface, uids[4], v6, tcp, mac, srcIp6, dstIp6, sport, dport, now); in testWakeupEventLogging()
107 wakeupEvent(iface, uids[6], v6, udp, mac, srcIp6, dstIp6, sport, dport, now); in testWakeupEventLogging()
108 wakeupEvent(iface, uids[7], v6, tcp, mac, srcIp6, dstIp6, sport, dport, now); in testWakeupEventLogging()
109 wakeupEvent(iface, uids[8], v6, udp, mac, srcIp6, dstIp6, sport, dport, now); in testWakeupEventLogging()
165 final int v6 = 0x86dd; in testWakeupStatsLogging() local
174 wakeupEvent("wlan0", -1, v6, icmp6, mac, srcIp6, dstIp6, sport, dport, now); in testWakeupStatsLogging()
178 wakeupEvent("wlan0", 1000, v6, tcp, mac, srcIp6, dstIp6, sport, dport, now); in testWakeupStatsLogging()
[all …]
/frameworks/compile/mclinker/unittests/
DGCFactoryListTraitsTest.cpp62 #define CHECK_LIST_VALUE(v1, v2, v3, v4, v5, v6, v7, v8, v9, v10) \ argument
70 CHECK_NODE_VALUE(v6); \
/frameworks/base/tests/LegacyRestoreTest/
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