Searched refs:phPalEse_e_ChipRst (Results 1 – 7 of 7) sorted by relevance
| /hardware/nxp/secure_element/libese-spi/p73/spm/ |
| D | phNxpEse_Spm.cpp | 99 ret = phPalEse_ioctl(phPalEse_e_ChipRst, pEseDeviceHandle, arg); in phNxpEse_SPM_ConfigPwr()
195 ret = phPalEse_ioctl(phPalEse_e_ChipRst, pEseDeviceHandle, 0); in phNxpEse_SPM_EnablePwr()
234 ret = phPalEse_ioctl(phPalEse_e_ChipRst, pEseDeviceHandle, 1); in phNxpEse_SPM_DisablePwr()
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| /hardware/nxp/nfc/halimpl/tml/ |
| D | spi_spm.h | 34 phPalEse_e_ChipRst, /*!< eSE Chip reset using ISO RST pin*/ enumerator
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| D | spi_spm.cc | 51 case phPalEse_e_ChipRst: in phPalEse_spi_ioctl()
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| /hardware/nxp/secure_element/libese-spi/p73/pal/ |
| D | phNxpEsePal.h | 51 phPalEse_e_ChipRst, /*!< eSE Chip reset using ISO RST pin*/ enumerator
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| /hardware/nxp/secure_element/libese-spi/p73/pal/spi/ |
| D | phNxpEsePal_spi.cpp | 310 case phPalEse_e_ChipRst: in phPalEse_spi_ioctl()
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| /hardware/nxp/secure_element/libese-spi/p73/lib/ |
| D | phNxpEse_Api.cpp | 789 status = phPalEse_ioctl(phPalEse_e_ChipRst, nxpese_ctxt.pDevHandle, 6); in phNxpEse_chipReset()
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| /hardware/nxp/nfc/halimpl/hal/ |
| D | phNxpNciHal.cc | 2554 ret = phPalEse_spi_ioctl(phPalEse_e_ChipRst, gpphTmlNfc_Context->pDevHandle, level); in phNxpNciHal_ioctl()
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