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Searched refs:v4Mask (Results 1 – 10 of 10) sorted by relevance

/hardware/qcom/sdm845/data/ipacfg-mgr/hal/src/
DPrefixParser.cpp90 uint32_t masked = mPrefixes[i].v4Addr & mPrefixes[i].v4Mask; in allAreFullyQualified()
318 out.v4Mask = createMask(mask); in populateV4Mask()
358 ret.v4Mask = 0; in makeBlankPrefix()
/hardware/qcom/data/ipacfg-mgr/msm8998/hal/src/
DPrefixParser.cpp90 uint32_t masked = mPrefixes[i].v4Addr & mPrefixes[i].v4Mask; in allAreFullyQualified()
312 out.v4Mask = createMask(mask); in populateV4Mask()
352 ret.v4Mask = 0; in makeBlankPrefix()
/hardware/qcom/data/ipacfg-mgr/msm8998/hal/inc/
DIOffloadManager.h64 uint32_t v4Mask; member
/hardware/qcom/sdm845/data/ipacfg-mgr/hal/inc/
DIOffloadManager.h64 uint32_t v4Mask; member
/hardware/qcom/sdm845/data/ipacfg-mgr/ipacm/inc/
DIPACM_Defs.h373 uint32_t v4Mask; member
/hardware/qcom/data/ipacfg-mgr/msm8998/ipacm/inc/
DIPACM_Defs.h359 uint32_t v4Mask; member
/hardware/qcom/sdm845/data/ipacfg-mgr/ipacm/src/
DIPACM_OffloadManager.cpp204 IPACMDBG_H("subnet info v4Addr (%x) v4Mask (%x)\n", prefix.v4Addr, prefix.v4Mask); in addDownstream()
251 event_cache[latest_cache_index].prefix_cache.v4Mask, in addDownstream()
897 event_cache[latest_cache_index].prefix_cache.v4Mask, in push_framework_event()
DIPACM_Lan.cpp1653 flt_rule_entry.rule.attrib.u.v4.src_addr_mask = prefix[IPA_IP_v4].v4Mask; in handle_wan_up()
3354 flt_rule_entry.rule.eq_attrib.offset_meq_32[eq_index].mask = prefix[IPA_IP_v4].v4Mask; in handle_uplink_filter_rule()
/hardware/qcom/data/ipacfg-mgr/msm8998/ipacm/src/
DIPACM_OffloadManager.cpp203 IPACMDBG_H("subnet info v4Addr (%x) v4Mask (%x)\n", prefix.v4Addr, prefix.v4Mask); in addDownstream()
243 event_cache[latest_cache_index].prefix_cache.v4Mask, in addDownstream()
DIPACM_Lan.cpp1475 flt_rule_entry.rule.attrib.u.v4.dst_addr_mask = prefix[IPA_IP_v4].v4Mask; in handle_wan_up()
3117 flt_rule_entry.rule.eq_attrib.offset_meq_32[eq_index].mask = prefix[IPA_IP_v4].v4Mask; in handle_uplink_filter_rule()