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Searched refs:HS (Results 1 – 7 of 7) sorted by relevance

/system/core/libpixelflinger/tests/arch-arm64/assembler/
Darm64_assembler_test.cpp120 HS = CS, enumerator
210 {0xA030,INSTR_CMP,AL,AL,1,0x10000,NA,1,0x10000,0,0,0,NA,0,0,1,HS},
217 {0xA037,INSTR_CMP,AL,AL,1,0x10000,NA,0,0,0x10000,0,0,NA,0,0,1,HS},
218 {0xA038,INSTR_CMP,AL,AL,1,0x10000,NA,0,0,0x00000,0,0,NA,0,0,1,HS},
225 {0xA045,INSTR_CMP,AL,AL,1,1,NA,0,0,MAX_32BIT ,SHIFT_LSR,31,NA,0,0,1,HS},
226 {0xA046,INSTR_CMP,AL,AL,1,0x10000,NA,0,0,0x2000,SHIFT_LSR,1,NA,0,0,1,HS},
233 {0xA053,INSTR_CMP,AL,AL,1,1,NA,0,0,0x10000,SHIFT_ASR,31,NA,0,0,1,HS},
234 {0xA054,INSTR_CMP,AL,AL,1,1,NA,0,0,0x10000,SHIFT_ASR,16,NA,0,0,1,HS},
250 {0xA070,INSTR_SUB,CS,HS,0,2,NA,1,1,NA,NA,NA,2,1,1,0,NA},
251 {0xA071,INSTR_SUB,CC,HS,0,2,NA,1,1,NA,NA,NA,2,1,2,0,NA},
[all …]
/system/core/libpixelflinger/codeflinger/
Dblending.cpp59 MOV(HS, 0, factor.reg, imm( 0x10000 )); in build_fog()
662 MOV(HS, 0, v.reg, imm( one )); in component_sat()
664 MVN(HS, 0, v.reg, imm( ~one )); in component_sat()
666 MOV(HS, 0, v.reg, imm( 1<<v.h )); in component_sat()
667 SUB(HS, 0, v.reg, v.reg, imm( 1<<v.l )); in component_sat()
DARMAssemblerInterface.h36 HS = CS, enumerator
DGGLAssembler.cpp713 case GGL_GEQUAL: cc = HS; break; in build_alpha_test()
734 case GGL_LEQUAL: ic = HS; break; in build_depth_test()
DMIPS64Assembler.cpp695 case HS: mMips->BGEU(cond.r1, cond.r2, label); break; in B()
DMIPSAssembler.cpp707 case HS: mMips->BGEU(cond.r1, cond.r2, label); break; in B()
/system/core/libpixelflinger/tests/arch-mips64/assembler/
Dmips64_assembler_test.cpp121 HS = CS, enumerator
228 {0xA040,INSTR_SUB,{1,R_a5,R_a6,1,1},HS,0,2,NA,1,1,NA,NA,NA,2,1,1},
229 {0xA041,INSTR_SUB,{1,R_a5,R_a6,0,1},HS,0,2,NA,1,1,NA,NA,NA,2,1,2},
283 {0xA095,INSTR_MOV,{1,R_a5,R_a6,1,UINT64_C(-1)},HS,0,NA,NA,1,0x80000001,NA,NA,NA,2,1,2},
284 …{0xA096,INSTR_MOV,{1,R_a5,R_a6,UINT64_C(-1),1},HS,0,NA,NA,1,0x80000001,NA,NA,NA,2,1,0xFFFFFFFF8000…
285 {0xA097,INSTR_MVN,{1,R_a5,R_a6,1,4},HS,0,NA,NA,1,MAX_32BIT-1,NA,NA,NA,2,1,2},
286 {0xA098,INSTR_MVN,{1,R_a5,R_a6,UINT64_C(-1),1},HS,0,NA,NA,1,MAX_32BIT-1,NA,NA,NA,2,1,1},