/system/core/libpixelflinger/codeflinger/ |
D | load_store.cpp | 135 MOV(AL, 0, d.reg, reg_imm(s, LSR, l)); // component = packed >> l; in extract() 212 ORR(AL, 0, d, d, reg_imm(d, LSR, sbits)); in expand() 328 MOV(AL, 0, ireg, reg_imm(s.reg, LSR, sl)); in downshift() 334 SUB(AL, 0, ireg, s.reg, reg_imm(s.reg, LSR, dbits)); in downshift() 336 if (shift>0) ADD(AL, 0, ireg, ireg, reg_imm(dither.reg, LSR, shift)); in downshift() 345 MOV(AL, 0, ireg, reg_imm(s.reg, LSR, shift)); in downshift() 353 MOV(AL, 0, d.reg, reg_imm(s.reg, LSR, shift)); in downshift() 355 ORR(AL, 0, d.reg, d.reg, reg_imm(s.reg, LSR, shift)); in downshift() 362 MOV(AL, 0, d.reg, reg_imm(s.reg, LSR, shift)); in downshift() 364 ORR(AL, 0, d.reg, d.reg, reg_imm(s.reg, LSR, shift)); in downshift()
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D | blending.cpp | 140 MOV(AL, 0, temp.reg, reg_imm(temp.reg, LSR, temp.l)); in build_blending() 150 MOV(AL, 0, fragment.reg, reg_imm(temp.reg, LSR, temp.l)); in build_blending() 333 ADD(AL, 0, factor.reg, fb.reg, reg_imm(fb.reg, LSR, fb.s-1)); in build_blend_factor() 339 reg_imm(fragment.reg, LSR, fragment.s-1)); in build_blend_factor() 345 reg_imm(src_alpha.reg, LSR, src_alpha.s-1)); in build_blend_factor() 352 reg_imm(factor.reg, LSR, factor.s-1)); in build_blend_factor() 373 MOV(AL, 0, factor.reg, reg_imm(factor.reg, LSR, factor.s-8)); in build_blend_factor() 449 if (shift>0) RSB(AL, 0, diff.reg, fb.reg, reg_imm(fragment.reg, LSR, shift)); in build_blendFOneMinusF() 467 if (shift>0) SUB(AL, 0, diff.reg, fb.reg, reg_imm(fragment.reg, LSR, shift)); in build_blendOneMinusFF() 546 MOV(AL, 0, d.reg, reg_imm(vreg, LSR, vshift)); in mul_factor() [all …]
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D | texturing.cpp | 99 MOV(AL, 0, end, reg_imm(parts.count.reg, LSR, 16)); in init_iterated_color() 163 reg_imm(parts.iterated.reg, LSR, 16)); in init_iterated_color() 828 MOV(AL, 0, u, reg_imm(u, LSR, adjust)); in filter16() 843 MOV(AL, 0, u, reg_imm(u, LSR, adjust)); in filter16() 857 MOV(AL, 0, u, reg_imm(u, LSR, adjust)); in filter16() 917 MOV(AL, 0, u, reg_imm(u, LSR, adjust)); in filter32() 920 AND(AL, 0, temp, mask, reg_imm(pixel, LSR, 8)); in filter32() 933 MOV(AL, 0, u, reg_imm(u, LSR, adjust)); in filter32() 936 AND(AL, 0, temp, mask, reg_imm(pixel, LSR, 8)); in filter32() 948 MOV(AL, 0, u, reg_imm(u, LSR, adjust)); in filter32() [all …]
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D | GGLAssembler.cpp | 431 ADD(AL, 0, Rs, Rs, reg_imm(parts.count.reg, LSR, 16)); in build_scanline_prolog() 554 MOV(AL, 0, fragment.reg, reg_imm(incoming.reg, LSR, incoming.l)); in build_incoming_component() 574 reg_imm(mAlphaSource.reg, LSR, shift)); in build_incoming_component() 583 reg_imm(fragment.reg, LSR, shift)); in build_incoming_component() 703 if (shift) CMP(AL, fragment.reg, reg_imm(ref, LSR, shift)); in build_alpha_test() 767 ADDR_SUB(AL, 0, zbase, zbase, reg_imm(parts.count.reg, LSR, 15)); in build_depth_test() 772 CMP(AL, depth, reg_imm(z, LSR, 16)); in build_depth_test() 780 MOV(AL, 0, depth, reg_imm(z, LSR, 16)); in build_depth_test()
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D | MIPS64Assembler.cpp | 377 case LSR: mMips->SRL(tmpReg, amode.reg, amode.value); break; in dataProcAdrModes() 500 case LSR: mMips->SRL(Rd, amode.reg, amode.value); break; in dataProcessing() 527 case LSR: mMips->SRL(Rd, amode.reg, amode.value); break; in dataProcessing()
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D | Arm64Assembler.cpp | 503 if(Op2 == OPERAND_REG_IMM && mAddrMode.reg_imm_type == LSR) in ADDR_SUB() 506 LSR, mAddrMode.reg_imm_shift); in ADDR_SUB()
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D | ARMAssemblerInterface.h | 43 LSL, LSR, ASR, ROR enumerator
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D | MIPSAssembler.cpp | 392 case LSR: mMips->SRL(tmpReg, amode.reg, amode.value); break; in dataProcAdrModes() 503 case LSR: mMips->SRL(Rd, amode.reg, amode.value); break; in dataProcessing() 535 case LSR: mMips->SRL(Rd, amode.reg, amode.value); break; in dataProcessing()
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