Searched refs:ORR (Results 1 – 6 of 6) sorted by relevance
| /system/core/libpixelflinger/codeflinger/ |
| D | load_store.cpp | 84 ORR(AL, 0, s.reg, s.reg, reg_imm(s0, LSL, 8)); in load()
86 ORR(AL, 0, s.reg, s.reg, reg_imm(s0, LSL, 16)); in load()
91 ORR(AL, 0, s1, s1, reg_imm(s0, LSL, 8)); in load()
93 ORR(AL, 0, s.reg, s1, reg_imm(s0, LSL, 16)); in load()
212 ORR(AL, 0, d, d, reg_imm(d, LSR, sbits)); in expand()
222 ORR(AL, 0, d, s, reg_imm(s, LSL, sbits)); in expand()
349 ORR(AL, 0, d.reg, d.reg, reg_imm(ireg, LSL, dl)); in downshift()
355 ORR(AL, 0, d.reg, d.reg, reg_imm(s.reg, LSR, shift)); in downshift()
364 ORR(AL, 0, d.reg, d.reg, reg_imm(s.reg, LSR, shift)); in downshift()
370 ORR(AL, 0, d.reg, d.reg, reg_imm(s.reg, LSL, -shift)); in downshift()
[all …]
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| D | texturing.cpp | 823 ORR(AL, 0, pixel, pixel, reg_imm(pixel, LSL, shift)); in filter16()
838 ORR(AL, 0, pixel, pixel, reg_imm(pixel, LSL, shift)); in filter16()
852 ORR(AL, 0, pixel, pixel, reg_imm(pixel, LSL, shift)); in filter16()
865 ORR(AL, 0, pixel, pixel, reg_imm(pixel, LSL, shift)); in filter16()
903 ORR(AL, 0, mask, mask, imm(0xFF0000)); in filter32()
965 ORR(AL, 0, texel.reg, dh, dl); in filter32()
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| D | GGLAssembler.cpp | 379 ORR(AL, 0, parts.count.reg, tx, reg_imm(parts.count.reg, LSL, 16)); in build_scanline_prolog()
837 case GGL_OR: ORR(AL, 0, pixel.reg, s.reg, d.reg); break; in build_logic_op()
838 case GGL_NOR: ORR(AL, 0, pixel.reg, s.reg, d.reg); in build_logic_op()
985 ORR(AL, 0, pixel.reg, s.reg, fb.reg); in build_masking()
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| D | ARMAssemblerInterface.h | 253 ORR(int cc, int s, int Rd, int Rn, uint32_t Op2) { in ORR() function
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| /system/core/libpixelflinger/tests/arch-mips64/assembler/ |
| D | mips64_assembler_test.cpp | 415 case INSTR_ORR: a64asm->ORR(test.cond, test.setFlags, Rd,Rn,op2); break; in dataOpTest()
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| /system/core/libpixelflinger/tests/arch-arm64/assembler/ |
| D | arm64_assembler_test.cpp | 453 case INSTR_ORR: a64asm->ORR(test.cond, test.setFlags, Rd,Rn,op2); break; in dataOpTest()
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