Searched refs:reg (Results 1 – 7 of 7) sorted by relevance
121 dex::u4 reg = 0; in Apply() local131 reg = bytecode->CastOperand<lir::VReg>(0)->reg; in Apply()137 reg = bytecode->CastOperand<lir::VReg>(0)->reg; in Apply()143 reg = bytecode->CastOperand<lir::VRegPair>(0)->base_reg; in Apply()152 auto args = code_ir->Alloc<lir::VRegRange>(reg, reg_count); in Apply()279 vreg->reg += shift_; in Visit()289 for (auto& reg : vreg_list->registers) { in Visit() local290 reg += shift_; in Visit()363 dex::u4 reg = regs - ins_count; in ShiftParams() local369 move->operands.push_back(code_ir->Alloc<lir::VReg>(reg - shift)); in ShiftParams()[all …]
72 auto reg = dbg_annotation->CastOperand<VReg>(0)->reg; in Visit() local76 dbginfo_.PushULeb128(reg); in Visit()82 auto reg = dbg_annotation->CastOperand<VReg>(0)->reg; in Visit() local87 dbginfo_.PushULeb128(reg); in Visit()95 auto reg = dbg_annotation->CastOperand<VReg>(0)->reg; in Visit() local97 dbginfo_.PushULeb128(reg); in Visit()
99 : bytecode->CastOperand<VReg>(index)->reg; in GetRegA()108 : bytecode->CastOperand<VReg>(index)->reg; in GetRegB()117 : bytecode->CastOperand<VReg>(index)->reg; in GetRegC()
234 dex::u4 reg = 0; in StressExitHook() local244 reg = bytecode->CastOperand<lir::VReg>(0)->reg; in StressExitHook()250 reg = bytecode->CastOperand<lir::VReg>(0)->reg; in StressExitHook()256 reg = bytecode->CastOperand<lir::VRegPair>(0)->base_reg; in StressExitHook()265 auto args = code_ir.Alloc<lir::VRegRange>(reg, reg_count); in StressExitHook()
134 printf("v%d", vreg->reg); in Visit()146 for (auto reg : vreg_list->registers) { in Visit() local147 printf("%sv%d", (first ? "" : ","), reg); in Visit()
152 dex::u4 reg; member154 explicit VReg(dex::u4 reg) : reg(reg) {} in VReg()
162 reg = re.compile(r'(.|\n)*}\n\n')163 if not reg.match(buf) or data == '':