/external/llvm/lib/Target/SystemZ/ |
D | SystemZMachineFunctionInfo.h | 48 void setVarArgsFirstGPR(unsigned GPR) { VarArgsFirstGPR = GPR; } in setVarArgsFirstGPR()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/SystemZ/ |
D | SystemZMachineFunctionInfo.h | 48 void setVarArgsFirstGPR(unsigned GPR) { VarArgsFirstGPR = GPR; } in setVarArgsFirstGPR()
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/external/swiftshader/third_party/subzero/unittest/AssemblerX8664/ |
D | XmmArith.cpp | 1462 #define TestImplSXmmReg(Dst, GPR, Inst, Size, IntType) \ in TEST_F() argument 1481 #define TestImplSRegXmm(GPR, Src, Inst, IntSize, Size) \ in TEST_F() argument 1541 #define TestImplSRegAddr(GPR, Inst, IntSize, Size) \ in TEST_F() argument 1561 #define TestImplSize(Dst, Src, GPR, Size) \ in TEST_F() argument 1579 #define TestImpl(Dst, Src, GPR) \ in TEST_F() argument 1927 #define TestPinsrXmmGPRImm(Dst, Value0, GPR, Value1, Imm, Size) \ in TEST_F() argument 1975 #define TestPinsrSize(Dst, GPR, Value1, Imm, Size) \ in TEST_F() argument 2020 #define TestPextrGPRXmmImm(GPR, Src, Value1, Imm, Size) \ in TEST_F() argument 2040 #define TestPextrSize(GPR, Src, Value1, Imm, Size) \ in TEST_F() argument
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D | DataMov.cpp | 1356 #define TestMovmskGPRXmm(GPR, Src, Value1, Expected, Inst) \ in TEST_F() argument 1374 #define TestMovmsk(GPR, Src) \ in TEST_F() argument
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/external/swiftshader/third_party/subzero/unittest/AssemblerX8632/ |
D | XmmArith.cpp | 1389 #define TestImplSXmmReg(Dst, GPR, Inst, Size) \ in TEST_F() argument 1409 #define TestImplSRegXmm(GPR, Src, Inst, Size) \ in TEST_F() argument 1470 #define TestImplSRegAddr(GPR, Inst, Size) \ in TEST_F() argument 1490 #define TestImplSize(Dst, Src, GPR, Size) \ in TEST_F() argument 1504 #define TestImpl(Dst, Src, GPR) \ in TEST_F() argument 1824 #define TestPinsrXmmGPRImm(Dst, Value0, GPR, Value1, Imm, Size) \ in TEST_F() argument 1872 #define TestPinsrSize(Dst, GPR, Value1, Imm, Size) \ in TEST_F() argument 1909 #define TestPextrGPRXmmImm(GPR, Src, Value1, Imm, Size) \ in TEST_F() argument 1929 #define TestPextrSize(GPR, Src, Value1, Imm, Size) \ in TEST_F() argument
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D | DataMov.cpp | 968 #define TestMovmskGPRXmm(GPR, Src, Value1, Expected, Inst) \ in TEST_F() argument 987 #define TestMovmsk(GPR, Src) \ in TEST_F() argument
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/external/llvm/lib/Target/Hexagon/ |
D | HexagonGenPredicate.cpp | 407 Register GPR = MI->getOperand(i); in convertToPredForm() local
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/ |
D | HexagonGenPredicate.cpp | 425 Register GPR = MI->getOperand(i); in convertToPredForm() local
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/external/kernel-headers/original/uapi/sound/ |
D | emu10k1.h | 99 #define GPR(x) (FXGPREGBASE + (x)) /* free GPRs: x = 0x00 - 0xff */ macro
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/external/llvm/lib/Target/PowerPC/ |
D | PPCISelLowering.cpp | 3148 static const MCPhysReg GPR[] = { in LowerFormalArguments_64SVR4() local 3584 const MCPhysReg *GPR = isPPC64 ? GPR_64 : GPR_32; in LowerFormalArguments_Darwin() local 3973 static const MCPhysReg GPR[] = { in needStackSlotPassParameters() local 5029 static const MCPhysReg GPR[] = { in LowerCall_64SVR4() local 5748 const MCPhysReg *GPR = isPPC64 ? GPR_64 : GPR_32; in LowerCall_Darwin() local
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/ |
D | PPCISelLowering.cpp | 3635 static const MCPhysReg GPR[] = { in LowerFormalArguments_64SVR4() local 4065 const MCPhysReg *GPR = isPPC64 ? GPR_64 : GPR_32; in LowerFormalArguments_Darwin() local 4470 static const MCPhysReg GPR[] = { in needStackSlotPassParameters() local 5561 static const MCPhysReg GPR[] = { in LowerCall_64SVR4() local 6305 const MCPhysReg *GPR = isPPC64 ? GPR_64 : GPR_32; in LowerCall_Darwin() local
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/external/u-boot/arch/arm/include/asm/arch-imx/ |
D | imx-regs.h | 125 #define GPR(x) __REG2(IMX_GPIO_BASE + 0x38, ((x) & 3) << 8) macro
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/external/swiftshader/third_party/LLVM/lib/Target/PowerPC/ |
D | PPCISelLowering.cpp | 1885 const unsigned *GPR = isPPC64 ? GPR_64 : GPR_32; in LowerFormalArguments_Darwin() local 3141 const unsigned *GPR = isPPC64 ? GPR_64 : GPR_32; in LowerCall_Darwin() local
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/AsmParser/ |
D | ARMAsmParser.cpp | 6013 const MCRegisterClass &GPR = MRI->getRegClass(ARM::GPRRegClassID); in fixupGNULDRDAlias() local
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/external/llvm/lib/Target/X86/ |
D | X86ISelLowering.cpp | 2737 unsigned GPR = MF.addLiveIn(Reg, &X86::GR64RegClass); in LowerFormalArguments() local
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
D | X86ISelLowering.cpp | 3207 unsigned GPR = MF.addLiveIn(Reg, &X86::GR64RegClass); in LowerFormalArguments() local
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