/external/llvm/lib/Target/AMDGPU/ |
D | SILoadStoreOptimizer.cpp | 131 unsigned Offset1, in offsetsCanBeCombined() 182 unsigned Offset1 = MBBI->getOperand(OffsetIdx).getImm() & 0xffff; in findMatchingDSInst() local 207 unsigned Offset1 in mergeRead2Pair() local 303 unsigned Offset1 in mergeWrite2Pair() local
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D | AMDGPUInstrInfo.cpp | 51 int64_t Offset0, int64_t Offset1, in shouldScheduleLoadsNear()
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D | SIInstrInfo.cpp | 232 uint8_t Offset1 = Offset1Imm->getImm(); in getMemOpBaseRegImmOfs() local 1344 int64_t Offset0, Offset1; in checkInstOffsetsDoNotOverlap() local
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/external/llvm/lib/Fuzzer/test/ |
D | CustomCrossOverTest.cpp | 43 size_t Offset1 = 0; in LLVMFuzzerCustomCrossOver() local
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/external/swiftshader/third_party/LLVM/include/llvm/Target/ |
D | TargetInstrInfo.h | 492 int64_t &Offset1, int64_t &Offset2) const { in areLoadsFromSameBasePtr() 505 int64_t Offset1, int64_t Offset2, in shouldScheduleLoadsNear()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/ |
D | HexagonSubtarget.cpp | 292 int Offset1; in apply() local
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/external/llvm/include/llvm/Target/ |
D | TargetInstrInfo.h | 1001 int64_t &Offset1, int64_t &Offset2) const { in areLoadsFromSameBasePtr() 1014 int64_t Offset1, int64_t Offset2, in shouldScheduleLoadsNear()
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/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/ |
D | TargetInstrInfo.h | 1102 int64_t &Offset1, in areLoadsFromSameBasePtr() 1116 int64_t Offset1, int64_t Offset2, in shouldScheduleLoadsNear()
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/external/swiftshader/third_party/LLVM/lib/Transforms/IPO/ |
D | MergeFunctions.cpp | 352 uint64_t Offset1 = TD->getIndexedOffset(GEP1->getPointerOperandType(), in isEquivalentGEP() local
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/external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
D | ScheduleDAGSDNodes.cpp | 191 int64_t Offset1, Offset2; in ClusterNeighboringLoads() local
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Transforms/Scalar/ |
D | SeparateConstOffsetFromGEP.cpp | 1294 Value *Offset1 = First->getOperand(1); in swapGEPOperand() local
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D | MemCpyOptimizer.cpp | 149 int64_t Offset1 = GetOffsetFromIndex(GEP1, Idx, VariableIdxFound, DL); in IsPointerOffset() local
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
D | SILoadStoreOptimizer.cpp | 93 unsigned Offset1; member
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D | SIInstrInfo.cpp | 294 uint8_t Offset1 = Offset1Imm->getImm(); in getMemOpBaseRegImmOfs() local 467 int64_t Offset0, int64_t Offset1, in shouldScheduleLoadsNear() 2121 int64_t Offset0, Offset1; in checkInstOffsetsDoNotOverlap() local
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/external/swiftshader/third_party/LLVM/lib/Transforms/Scalar/ |
D | MemCpyOptimizer.cpp | 109 int64_t Offset1 = GetOffsetFromIndex(GEP1, Idx, VariableIdxFound, TD); in IsPointerOffset() local
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/ |
D | MicroMipsSizeReduction.cpp | 394 int64_t Offset1, Offset2; in ConsecutiveInstr() local
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/external/llvm/lib/Transforms/Scalar/ |
D | SeparateConstOffsetFromGEP.cpp | 1246 Value *Offset1 = First->getOperand(1); in swapGEPOperand() local
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D | MemCpyOptimizer.cpp | 114 int64_t Offset1 = GetOffsetFromIndex(GEP1, Idx, VariableIdxFound, DL); in IsPointerOffset() local
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/external/llvm/lib/CodeGen/SelectionDAG/ |
D | ScheduleDAGSDNodes.cpp | 225 int64_t Offset1, Offset2; in ClusterNeighboringLoads() local
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/ |
D | ScheduleDAGSDNodes.cpp | 226 int64_t Offset1, Offset2; in ClusterNeighboringLoads() local
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/external/swiftshader/third_party/LLVM/lib/Target/X86/ |
D | X86InstrInfo.cpp | 3133 int64_t &Offset1, int64_t &Offset2) const { in areLoadsFromSameBasePtr() 3238 int64_t Offset1, int64_t Offset2, in shouldScheduleLoadsNear()
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/external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
D | ARMBaseInstrInfo.cpp | 1254 int64_t &Offset1, in areLoadsFromSameBasePtr() 1329 int64_t Offset1, int64_t Offset2, in shouldScheduleLoadsNear()
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/external/llvm/lib/Target/ARM/ |
D | ARMBaseInstrInfo.cpp | 1546 int64_t &Offset1, in areLoadsFromSameBasePtr() 1627 int64_t Offset1, int64_t Offset2, in shouldScheduleLoadsNear()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
D | ARMBaseInstrInfo.cpp | 1724 int64_t &Offset1, in areLoadsFromSameBasePtr() 1805 int64_t Offset1, int64_t Offset2, in shouldScheduleLoadsNear()
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/external/llvm/lib/Target/X86/ |
D | X86InstrInfo.cpp | 6611 int64_t &Offset1, int64_t &Offset2) const { in areLoadsFromSameBasePtr() 6716 int64_t Offset1, int64_t Offset2, in shouldScheduleLoadsNear()
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