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Searched defs:OpRC (Results 1 – 9 of 9) sorted by relevance

/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/
DBreakFalseDeps.cpp126 const TargetRegisterClass *OpRC = in pickBestRegisterForUndef() local
DMachineInstr.cpp721 const TargetRegisterClass *OpRC = getRegClassConstraint(OpIdx, TII, TRI); in getRegClassConstraintEffect() local
/external/swiftshader/third_party/LLVM/lib/CodeGen/
DMachineRegisterInfo.cpp82 const TargetRegisterClass *OpRC = in recomputeRegClass() local
/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/
DInstrEmitter.cpp333 const TargetRegisterClass *OpRC = nullptr; in AddRegisterOperand() local
399 const TargetRegisterClass *OpRC = in AddOperand() local
/external/llvm/lib/Target/AMDGPU/
DSIInstrInfo.cpp2236 const TargetRegisterClass *OpRC = in legalizeOperands() local
2290 const TargetRegisterClass *OpRC = MRI.getRegClass(Op.getReg()); in legalizeOperands() local
3003 const TargetRegisterClass *OpRC = RI.getRegClass(Desc.OpInfo[Idx].RegClass); in findUsedSGPR() local
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/
DSIInstrInfo.cpp3455 const TargetRegisterClass *OpRC = RI.getSubClassWithSubReg( in legalizeGenericOperand() local
3509 const TargetRegisterClass *OpRC = in legalizeOperands() local
3562 const TargetRegisterClass *OpRC = MRI.getRegClass(Op.getReg()); in legalizeOperands() local
4615 const TargetRegisterClass *OpRC = RI.getRegClass(Desc.OpInfo[Idx].RegClass); in findUsedSGPR() local
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/
DX86SpeculativeLoadHardening.cpp1764 auto *OpRC = MRI->getRegClass(OpReg); in hardenLoadAddr() local
/external/llvm/lib/CodeGen/
DMachineInstr.cpp1246 const TargetRegisterClass *OpRC = getRegClassConstraint(OpIdx, TII, TRI); in getRegClassConstraintEffect() local
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/
DHexagonBitSimplify.cpp1879 auto *OpRC = HII.getRegClass(HII.get(Opc), OpNum, &HRI, MF); in validateReg() local