| /external/v8/src/compiler/arm64/ |
| D | code-generator-arm64.cc | 1098 __ Orn(i.OutputRegister(), i.InputOrZeroRegister64(0), in AssembleArchInstruction() local
1102 __ Orn(i.OutputRegister32(), i.InputOrZeroRegister32(0), in AssembleArchInstruction() local
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| /external/vixl/test/aarch64/ |
| D | test-assembler-aarch64.cc | 860 __ Orn(x2, x0, Operand(x1)); in TEST() local
861 __ Orn(w3, w0, Operand(w1, LSL, 4)); in TEST() local
862 __ Orn(x4, x0, Operand(x1, LSL, 4)); in TEST() local
863 __ Orn(x5, x0, Operand(x1, LSR, 1)); in TEST() local
864 __ Orn(w6, w0, Operand(w1, ASR, 1)); in TEST() local
865 __ Orn(x7, x0, Operand(x1, ASR, 1)); in TEST() local
866 __ Orn(w8, w0, Operand(w1, ROR, 16)); in TEST() local
867 __ Orn(x9, x0, Operand(x1, ROR, 16)); in TEST() local
868 __ Orn(w10, w0, 0x0000ffff); in TEST() local
869 __ Orn(x11, x0, 0x0000ffff0000ffff); in TEST() local
[all …]
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| /external/v8/src/arm64/ |
| D | macro-assembler-arm64-inl.h | 69 void TurboAssembler::Orn(const Register& rd, const Register& rn, in Orn() function
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| /external/vixl/src/aarch64/ |
| D | macro-assembler-aarch64.cc | 776 void MacroAssembler::Orn(const Register& rd, in Orn() function in vixl::aarch64::MacroAssembler
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| /external/vixl/test/aarch32/ |
| D | test-assembler-aarch32.cc | 3267 __ Orn(r0, r0, 0xffffffff); in TEST() local
3311 __ Orn(r4, r0, 0); in TEST() local
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| /external/vixl/src/aarch32/ |
| D | macro-assembler-aarch32.h | 2690 void Orn(Condition cond, Register rd, Register rn, const Operand& operand) { in Orn() function
2710 void Orn(Register rd, Register rn, const Operand& operand) { in Orn() function
2713 void Orn(FlagsUpdate flags, in Orn() function
2730 void Orn(FlagsUpdate flags, in Orn() function
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