/external/vogar/src/vogar/commands/ |
D | Rm.java | 25 public final class Rm { class 28 public Rm(Log log) { in Rm() method in Rm
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/external/swiftshader/third_party/LLVM/lib/Target/ARM/Disassembler/ |
D | ARMDisassembler.cpp | 1023 unsigned Rm = fieldFromInstruction32(Val, 0, 4); in DecodeSORegImmOperand() local 1060 unsigned Rm = fieldFromInstruction32(Val, 0, 4); in DecodeSORegRegOperand() local 1342 unsigned Rm = fieldFromInstruction32(Insn, 0, 4); in DecodeAddrMode2IdxInstruction() local 1444 unsigned Rm = fieldFromInstruction32(Val, 0, 4); in DecodeSORegMemOperand() local 1486 unsigned Rm = fieldFromInstruction32(Insn, 0, 4); in DecodeAddrMode3Instruction() local 1841 unsigned Rm = fieldFromInstruction32(Insn, 8, 4); in DecodeSMLAInstruction() local 1942 unsigned Rm = fieldFromInstruction32(Val, 0, 4); in DecodeAddrMode6Operand() local 1964 unsigned Rm = fieldFromInstruction32(Insn, 0, 4); in DecodeVLDInstruction() local 2213 unsigned Rm = fieldFromInstruction32(Insn, 0, 4); in DecodeVSTInstruction() local 2461 unsigned Rm = fieldFromInstruction32(Insn, 0, 4); in DecodeVLD1DupInstruction() local [all …]
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/external/capstone/arch/ARM/ |
D | ARMDisassembler.c | 1165 unsigned Rm = fieldFromInstruction_4(Val, 0, 4); in DecodeSORegImmOperand() local 1204 unsigned Rm = fieldFromInstruction_4(Val, 0, 4); in DecodeSORegRegOperand() local 1520 unsigned Rm = fieldFromInstruction_4(Insn, 0, 4); in DecodeAddrMode2IdxInstruction() local 1626 unsigned Rm = fieldFromInstruction_4(Val, 0, 4); in DecodeSORegMemOperand() local 1670 unsigned Rm = fieldFromInstruction_4(Insn, 0, 4); in DecodeAddrMode3Instruction() local 1892 unsigned Rm = fieldFromInstruction_4(Insn, 0, 4); in DecodeQADDInstruction() local 2149 unsigned Rm = fieldFromInstruction_4(Insn, 8, 4); in DecodeSMLAInstruction() local 2271 unsigned Rm = fieldFromInstruction_4(Val, 0, 4); in DecodeAddrMode6Operand() local 2288 unsigned wb, Rn, Rm; in DecodeVLDInstruction() local 2622 unsigned wb, Rn, Rm; in DecodeVSTInstruction() local [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/Disassembler/ |
D | ARMDisassembler.cpp | 1139 unsigned Rm = fieldFromInstruction(Val, 0, 4); in DecodeSORegImmOperand() local 1176 unsigned Rm = fieldFromInstruction(Val, 0, 4); in DecodeSORegRegOperand() local 1476 unsigned Rm = fieldFromInstruction(Insn, 0, 4); in DecodeAddrMode2IdxInstruction() local 1580 unsigned Rm = fieldFromInstruction(Val, 0, 4); in DecodeSORegMemOperand() local 1625 unsigned Rm = fieldFromInstruction(Insn, 0, 4); in DecodeAddrMode3Instruction() local 1844 unsigned Rm = fieldFromInstruction(Insn, 0, 4); in DecodeQADDInstruction() local 2122 unsigned Rm = fieldFromInstruction(Insn, 8, 4); in DecodeSMLAInstruction() local 2150 unsigned Rm = fieldFromInstruction(Insn, 0, 4); in DecodeTSTInstruction() local 2315 unsigned Rm = fieldFromInstruction(Val, 0, 4); in DecodeAddrMode6Operand() local 2337 unsigned Rm = fieldFromInstruction(Insn, 0, 4); in DecodeVLDInstruction() local [all …]
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/external/llvm/lib/Target/ARM/Disassembler/ |
D | ARMDisassembler.cpp | 1140 unsigned Rm = fieldFromInstruction(Val, 0, 4); in DecodeSORegImmOperand() local 1177 unsigned Rm = fieldFromInstruction(Val, 0, 4); in DecodeSORegRegOperand() local 1477 unsigned Rm = fieldFromInstruction(Insn, 0, 4); in DecodeAddrMode2IdxInstruction() local 1581 unsigned Rm = fieldFromInstruction(Val, 0, 4); in DecodeSORegMemOperand() local 1626 unsigned Rm = fieldFromInstruction(Insn, 0, 4); in DecodeAddrMode3Instruction() local 1845 unsigned Rm = fieldFromInstruction(Insn, 0, 4); in DecodeQADDInstruction() local 2123 unsigned Rm = fieldFromInstruction(Insn, 8, 4); in DecodeSMLAInstruction() local 2151 unsigned Rm = fieldFromInstruction(Insn, 0, 4); in DecodeTSTInstruction() local 2317 unsigned Rm = fieldFromInstruction(Val, 0, 4); in DecodeAddrMode6Operand() local 2339 unsigned Rm = fieldFromInstruction(Insn, 0, 4); in DecodeVLDInstruction() local [all …]
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/external/swiftshader/third_party/subzero/src/ |
D | IceAssemblerX86Base.h | 882 void emitRexRB(const Type Ty, const RegType Reg, const RmType Rm) { in emitRexRB() 888 const RmType Rm) { in emitRexRB() 895 template <typename RmType> void emitRexB(const Type Ty, const RmType Rm) { in emitRexB()
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D | IceAssemblerARM32.cpp | 334 IValueT encodeShiftRotateImm5(IValueT Rm, OperandARM32::ShiftKind Shift, in encodeShiftRotateImm5() 343 IValueT encodeShiftRotateReg(IValueT Rm, OperandARM32::ShiftKind Shift, in encodeShiftRotateReg() 389 IValueT Rm; in encodeOperand() local 984 RegARM32::GPRRegister Rm = getGPRReg(kRmShift, Address); in emitMemOp() local 1061 IValueT Rn, IValueT Rm) { in emitDivOp() 1128 IValueT Rn, IValueT Rm, IValueT Rs, in emitMulOp() 1158 IValueT Rm = encodeGPRegister(OpSrc0, "Rm", InstName); in emitSignExtend() local 1434 IValueT Rm = encodeGPRegister(Target, "Rm", BlxName); in blx() local 1442 void AssemblerARM32::bx(RegARM32::GPRRegister Rm, CondARM32::Cond Cond) { in bx() 1466 IValueT Rm = encodeGPRegister(OpSrc, RmName, ClzName); in clz() local [all …]
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/external/llvm/lib/Target/ARM/ |
D | ARMBaseInstrInfo.cpp | 2821 unsigned Rm = MI.getOperand(3).getReg(); in getNumMicroOpsSwiftLdSt() local 2828 unsigned Rm = MI.getOperand(3).getReg(); in getNumMicroOpsSwiftLdSt() local 2858 unsigned Rm = MI.getOperand(3).getReg(); in getNumMicroOpsSwiftLdSt() local 2870 unsigned Rm = MI.getOperand(3).getReg(); in getNumMicroOpsSwiftLdSt() local 2889 unsigned Rm = MI.getOperand(3).getReg(); in getNumMicroOpsSwiftLdSt() local 2909 unsigned Rm = MI.getOperand(3).getReg(); in getNumMicroOpsSwiftLdSt() local 2917 unsigned Rm = MI.getOperand(3).getReg(); in getNumMicroOpsSwiftLdSt() local 2935 unsigned Rm = MI.getOperand(4).getReg(); in getNumMicroOpsSwiftLdSt() local 2949 unsigned Rm = MI.getOperand(4).getReg(); in getNumMicroOpsSwiftLdSt() local
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/external/v8/src/arm/ |
D | disasm-arm.cc | 417 void Decoder::FormatNeonMemory(int Rn, int align, int Rm) { in FormatNeonMemory() 2416 int Rm = instr->VmValue(); in DecodeSpecialCondition() local 2429 int Rm = instr->VmValue(); in DecodeSpecialCondition() local
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D | simulator-arm.cc | 5416 int Rm = instr->VmValue(); in DecodeSpecialCondition() local 5457 int Rm = instr->VmValue(); in DecodeSpecialCondition() local
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
D | ARMBaseInstrInfo.cpp | 3151 unsigned Rm = MI.getOperand(3).getReg(); in getNumMicroOpsSwiftLdSt() local 3158 unsigned Rm = MI.getOperand(3).getReg(); in getNumMicroOpsSwiftLdSt() local 3188 unsigned Rm = MI.getOperand(3).getReg(); in getNumMicroOpsSwiftLdSt() local 3200 unsigned Rm = MI.getOperand(3).getReg(); in getNumMicroOpsSwiftLdSt() local 3219 unsigned Rm = MI.getOperand(3).getReg(); in getNumMicroOpsSwiftLdSt() local 3239 unsigned Rm = MI.getOperand(3).getReg(); in getNumMicroOpsSwiftLdSt() local 3247 unsigned Rm = MI.getOperand(3).getReg(); in getNumMicroOpsSwiftLdSt() local 3265 unsigned Rm = MI.getOperand(4).getReg(); in getNumMicroOpsSwiftLdSt() local 3279 unsigned Rm = MI.getOperand(4).getReg(); in getNumMicroOpsSwiftLdSt() local
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/external/syzkaller/pkg/ifuzz/ |
D | ifuzz.go | 36 Rm int8 member
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/external/capstone/arch/AArch64/ |
D | AArch64Disassembler.c | 845 unsigned Rm = fieldFromInstruction(insn, 16, 5); in DecodeThreeAddrSRegInstruction() local 1398 unsigned Rd, Rn, Rm; in DecodeAddSubERegInstruction() local
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/external/llvm/lib/Target/AArch64/Disassembler/ |
D | AArch64Disassembler.cpp | 745 unsigned Rm = fieldFromInstruction(insn, 16, 5); in DecodeThreeAddrSRegInstruction() local 1298 unsigned Rm = fieldFromInstruction(insn, 16, 5); in DecodeAddSubERegInstruction() local
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/external/swiftshader/third_party/LLVM/lib/Target/ARM/MCTargetDesc/ |
D | ARMMCCodeEmitter.cpp | 693 unsigned Rm = getARMRegisterNumbering(MO2.getReg()); in getThumbAddrModeRegRegOpValue() local 897 unsigned Rm = getARMRegisterNumbering(MO1.getReg()); in getLdStSORegOpValue() local
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/Disassembler/ |
D | AArch64Disassembler.cpp | 930 unsigned Rm = fieldFromInstruction(insn, 16, 5); in DecodeThreeAddrSRegInstruction() local 1496 unsigned Rm = fieldFromInstruction(insn, 16, 5); in DecodeAddSubERegInstruction() local
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/MCTargetDesc/ |
D | ARMMCCodeEmitter.cpp | 877 unsigned Rm = CTX.getRegisterInfo()->getEncodingValue(MO2.getReg()); in getThumbAddrModeRegRegOpValue() local 1084 unsigned Rm = CTX.getRegisterInfo()->getEncodingValue(MO1.getReg()); in getLdStSORegOpValue() local
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/external/llvm/lib/Target/ARM/MCTargetDesc/ |
D | ARMMCCodeEmitter.cpp | 866 unsigned Rm = CTX.getRegisterInfo()->getEncodingValue(MO2.getReg()); in getThumbAddrModeRegRegOpValue() local 1073 unsigned Rm = CTX.getRegisterInfo()->getEncodingValue(MO1.getReg()); in getLdStSORegOpValue() local
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/external/vixl/src/aarch64/ |
D | assembler-aarch64.h | 3539 static Instr Rm(CPURegister rm) { in Rm() function
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/external/v8/src/arm64/ |
D | assembler-arm64.h | 2887 static Instr Rm(CPURegister rm) { in Rm() function
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