/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/ |
D | RegUsageInfoCollector.cpp | 105 BitVector SavedRegs; in runOnMachineFunction() local 151 computeCalleeSavedRegs(BitVector &SavedRegs, MachineFunction &MF) { in computeCalleeSavedRegs()
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D | TargetFrameLoweringImpl.cpp | 70 BitVector &SavedRegs, in determineCalleeSaves()
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D | ShrinkWrap.cpp | 167 BitVector SavedRegs; in getCurrentCSRs() local
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D | PrologEpilogInserter.cpp | 329 const BitVector &SavedRegs, in assignCalleeSavedSpillSlots() 521 BitVector SavedRegs; in spillCalleeSavedRegs() local
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D | RegisterScavenging.cpp | 794 BitVector SavedRegs; in runOnMachineFunction() local
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/external/llvm/lib/Target/BPF/ |
D | BPFFrameLowering.cpp | 33 BitVector &SavedRegs, in determineCalleeSaves()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/BPF/ |
D | BPFFrameLowering.cpp | 33 BitVector &SavedRegs, in determineCalleeSaves()
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/external/llvm/lib/CodeGen/ |
D | TargetFrameLoweringImpl.cpp | 61 BitVector &SavedRegs, in determineCalleeSaves()
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D | ShrinkWrap.cpp | 139 BitVector SavedRegs; in getCurrentCSRs() local
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D | PrologEpilogInserter.cpp | 326 const BitVector &SavedRegs, in assignCalleeSavedSpillSlots() 541 BitVector SavedRegs; in doSpillCalleeSavedRegs() local
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Lanai/ |
D | LanaiFrameLowering.cpp | 199 BitVector &SavedRegs, in determineCalleeSaves()
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/external/llvm/lib/Target/Lanai/ |
D | LanaiFrameLowering.cpp | 199 BitVector &SavedRegs, in determineCalleeSaves()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/ |
D | Mips16FrameLowering.cpp | 164 BitVector &SavedRegs, in determineCalleeSaves()
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D | MipsSEFrameLowering.cpp | 855 static void setAliasRegs(MachineFunction &MF, BitVector &SavedRegs, in setAliasRegs() 863 BitVector &SavedRegs, in determineCalleeSaves()
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/external/llvm/lib/Target/Mips/ |
D | Mips16FrameLowering.cpp | 159 BitVector &SavedRegs, in determineCalleeSaves()
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D | MipsSEFrameLowering.cpp | 833 static void setAliasRegs(MachineFunction &MF, BitVector &SavedRegs, in setAliasRegs() 841 BitVector &SavedRegs, in determineCalleeSaves()
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/external/llvm/lib/Target/Sparc/ |
D | SparcFrameLowering.cpp | 359 BitVector &SavedRegs, in determineCalleeSaves()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/RISCV/ |
D | RISCVFrameLowering.cpp | 206 BitVector &SavedRegs, in determineCalleeSaves()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Sparc/ |
D | SparcFrameLowering.cpp | 376 BitVector &SavedRegs, in determineCalleeSaves()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARC/ |
D | ARCFrameLowering.cpp | 89 BitVector &SavedRegs, in determineCalleeSaves()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AVR/ |
D | AVRFrameLowering.cpp | 418 BitVector &SavedRegs, in determineCalleeSaves()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/SystemZ/ |
D | SystemZFrameLowering.cpp | 66 BitVector &SavedRegs, in determineCalleeSaves()
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/external/llvm/lib/Target/SystemZ/ |
D | SystemZFrameLowering.cpp | 66 BitVector &SavedRegs, in determineCalleeSaves()
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/external/llvm/lib/Target/ARM/ |
D | ARMFrameLowering.cpp | 1425 checkNumAlignedDPRCS2Regs(MachineFunction &MF, BitVector &SavedRegs) { in checkNumAlignedDPRCS2Regs() 1469 BitVector &SavedRegs, in determineCalleeSaves()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/MCTargetDesc/ |
D | X86AsmBackend.cpp | 496 mutable unsigned SavedRegs[CU_NUM_SAVED_REGS]; member in __anon8fe69d320211::DarwinX86AsmBackend
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