/external/swiftshader/third_party/LLVM/lib/CodeGen/ |
D | IntrinsicLowering.cpp | 208 Value *Tmp6 = Builder.CreateShl(V, ConstantInt::get(V->getType(), 24), in LowerBSWAP() local
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/external/llvm/lib/CodeGen/ |
D | IntrinsicLowering.cpp | 208 Value *Tmp6 = Builder.CreateShl(V, ConstantInt::get(V->getType(), 24), in LowerBSWAP() local
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/ |
D | IntrinsicLowering.cpp | 207 Value *Tmp6 = Builder.CreateShl(V, ConstantInt::get(V->getType(), 24), in LowerBSWAP() local
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/external/llvm/lib/Transforms/Utils/ |
D | IntegerDivision.cpp | 311 Value *Tmp6 = Builder.CreateLShr(Q_2, MSB); in generateUnsignedDivisionCode() local
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Transforms/Utils/ |
D | IntegerDivision.cpp | 311 Value *Tmp6 = Builder.CreateLShr(Q_2, MSB); in generateUnsignedDivisionCode() local
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/external/clang/lib/CodeGen/ |
D | CGExprComplex.cpp | 786 llvm::Value *Tmp6 = Builder.CreateAdd(Tmp4, Tmp5); // cc+dd in EmitBinDiv() local
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/external/swiftshader/third_party/LLVM/lib/Target/PowerPC/ |
D | PPCISelLowering.cpp | 3816 SDValue Tmp6 = DAG.getNode(PPCISD::SHL, dl, VT, Lo, Tmp5); in LowerSHL_PARTS() local 3845 SDValue Tmp6 = DAG.getNode(PPCISD::SRL, dl, VT, Hi, Tmp5); in LowerSRL_PARTS() local 3873 SDValue Tmp6 = DAG.getNode(PPCISD::SRA, dl, VT, Hi, Tmp5); in LowerSRA_PARTS() local
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/external/llvm/lib/Target/PowerPC/ |
D | PPCISelLowering.cpp | 6946 SDValue Tmp6 = DAG.getNode(PPCISD::SHL, dl, VT, Lo, Tmp5); in LowerSHL_PARTS() local 6975 SDValue Tmp6 = DAG.getNode(PPCISD::SRL, dl, VT, Hi, Tmp5); in LowerSRL_PARTS() local 7003 SDValue Tmp6 = DAG.getNode(PPCISD::SRA, dl, VT, Hi, Tmp5); in LowerSRA_PARTS() local
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/external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
D | LegalizeDAG.cpp | 2732 SDValue Tmp1, Tmp2, Tmp3, Tmp4, Tmp5, Tmp6, Tmp7, Tmp8; in ExpandBSWAP() local
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/external/llvm/lib/CodeGen/SelectionDAG/ |
D | LegalizeDAG.cpp | 2583 SDValue Tmp1, Tmp2, Tmp3, Tmp4, Tmp5, Tmp6, Tmp7, Tmp8; in ExpandBSWAP() local
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/ |
D | PPCISelLowering.cpp | 7567 SDValue Tmp6 = DAG.getNode(PPCISD::SHL, dl, VT, Lo, Tmp5); in LowerSHL_PARTS() local 7596 SDValue Tmp6 = DAG.getNode(PPCISD::SRL, dl, VT, Hi, Tmp5); in LowerSRL_PARTS() local 7624 SDValue Tmp6 = DAG.getNode(PPCISD::SRA, dl, VT, Hi, Tmp5); in LowerSRA_PARTS() local
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/ |
D | LegalizeDAG.cpp | 2659 SDValue Tmp1, Tmp2, Tmp3, Tmp4, Tmp5, Tmp6, Tmp7, Tmp8; in ExpandBSWAP() local
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