| /external/u-boot/drivers/ddr/marvell/a38x/ |
| D | ddr3_training.c | 258 int ddr3_tip_configure_cs(u32 dev_num, u32 if_id, u32 cs_num, u32 enable) in ddr3_tip_configure_cs()
314 int calc_cs_num(u32 dev_num, u32 if_id, u32 *cs_num) in calc_cs_num()
354 u32 if_id; in hws_ddr3_tip_init_controller() local
695 static int ddr3_tip_rev2_rank_control(u32 dev_num, u32 if_id) in ddr3_tip_rev2_rank_control()
749 static int ddr3_tip_rev3_rank_control(u32 dev_num, u32 if_id) in ddr3_tip_rev3_rank_control()
782 static int ddr3_tip_rank_control(u32 dev_num, u32 if_id) in ddr3_tip_rank_control()
793 static int ddr3_tip_pad_inv(u32 dev_num, u32 if_id) in ddr3_tip_pad_inv()
1053 u32 if_id, u32 reg_addr, u32 data_value, u32 mask) in ddr3_tip_if_write()
1064 u32 if_id, u32 reg_addr, u32 *data, u32 mask) in ddr3_tip_if_read()
1075 u32 if_id, u32 exp_value, u32 mask, u32 offset, in ddr3_tip_if_polling()
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| D | ddr3_training_leveling.c | 29 u32 c_cs, if_id, bus_id; in ddr3_tip_max_cs_get() local
65 u32 bus_num, if_id, cl_val; in ddr3_tip_dynamic_read_leveling() local
342 u32 c_cs, if_id, cs_mask = 0; in ddr3_tip_legacy_dynamic_write_leveling() local
383 u32 c_cs, if_id, cs_mask = 0; in ddr3_tip_legacy_dynamic_read_leveling() local
425 u32 bus_num, if_id, cl_val, bit_num; in ddr3_tip_dynamic_per_bit_read_leveling() local
790 int ddr3_tip_calc_cs_mask(u32 dev_num, u32 if_id, u32 effective_cs, in ddr3_tip_calc_cs_mask()
833 u32 reg_data = 0, temp = 0, iter, if_id, bus_cnt; in ddr3_tip_dynamic_write_leveling() local
1203 u32 if_id, bus_id, data, data_tmp; in ddr3_tip_dynamic_write_leveling_supp() local
1313 static int ddr3_tip_wl_supp_align_phase_shift(u32 dev_num, u32 if_id, in ddr3_tip_wl_supp_align_phase_shift()
1393 static int ddr3_tip_xsb_compare_test(u32 dev_num, u32 if_id, u32 bus_id, in ddr3_tip_xsb_compare_test()
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| D | ddr3_debug.c | 111 u32 if_id, reg_addr, data_value, bus_id; in ddr3_tip_reg_dump() local
360 u32 if_id = 0; in ddr3_tip_print_log() local
528 u8 if_id = 0, csindex = 0, bus_id = 0, idx = 0; in ddr3_tip_print_stability_log() local
691 u32 if_id = 0, bus_id = 0; in ddr3_tip_read_adll_value() local
724 u32 if_id = 0, bus_id = 0; in ddr3_tip_write_adll_value() local
760 u32 if_id = 0, bus_id = 0; in read_phase_value() local
787 u32 if_id = 0, bus_id = 0; in write_leveling_value() local
851 u32 bus_cnt = 0, if_id, data_p1, data_p2, ui_data3, dev_num = 0; in ddr3_tip_print_adll() local
906 u32 tmp_val = 0, if_id = 0, pup_id = 0; in ddr3_tip_access_atr() local
1268 static u32 ddr3_tip_compare(u32 if_id, u32 *p_src, u32 *p_dst, in ddr3_tip_compare()
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| D | ddr3_training_hw_algo.c | 42 int ddr3_tip_write_additional_odt_setting(u32 dev_num, u32 if_id) in ddr3_tip_write_additional_odt_setting()
111 int get_valid_win_rx(u32 dev_num, u32 if_id, u8 res[4]) in get_valid_win_rx()
160 u32 pup = 0, if_id = 0, num_pup = 0, rep = 0; in ddr3_tip_vref() local
629 u32 if_id = 0; in ddr3_tip_cmd_addr_init_delay() local
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| D | ddr3_training_ip_engine.c | 570 u32 if_id, enum hws_pattern pattern, in ddr3_tip_load_pattern_to_odpg()
624 u32 if_id, enum hws_dir direction, u32 tx_phases, in ddr3_tip_configure_odpg()
690 int ddr3_tip_read_training_result(u32 dev_num, u32 if_id, in ddr3_tip_read_training_result()
847 u32 pattern = 0, if_id; in ddr3_tip_load_all_pattern_to_mem() local
874 u32 reg_data, if_id; in ddr3_tip_load_pattern_to_mem() local
955 u32 if_id, in ddr3_tip_ip_training_wrapper_int()
1093 u32 if_id, in ddr3_tip_ip_training_wrapper()
1443 u8 mv_ddr_tip_sub_phy_byte_status_get(u32 if_id, u32 subphy_id) in mv_ddr_tip_sub_phy_byte_status_get()
1448 void mv_ddr_tip_sub_phy_byte_status_set(u32 if_id, u32 subphy_id, u8 byte_status_data) in mv_ddr_tip_sub_phy_byte_status_set()
1458 u32 bus_cnt = 0, if_id, dev_num = 0; in ddr3_tip_load_phy_values() local
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| D | ddr3_training_pbs.c | 45 u32 pup = 0, bit = 0, if_id = 0, all_lock = 0, cs_num = 0; in ddr3_tip_pbs() local
939 u32 data_value = 0, bit = 0, if_id = 0, pup = 0; in ddr3_tip_print_pbs_result() local
989 u32 if_id, pup, bit; in ddr3_tip_clean_pbs_result() local
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| D | ddr3_training_centralization.c | 55 u32 if_id, pattern_id, bit_id; in ddr3_tip_centralization() local
496 u32 if_id, pup_id, pattern_id, bit_id; in ddr3_tip_special_rx() local
697 u32 if_id = 0, bus_id = 0; in ddr3_tip_print_centralization_result() local
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| D | ddr3_training_ip_flow.h | 25 #define IS_IF_ACTIVE(if_mask, if_id) \ argument
34 #define IS_BUS_ACTIVE(if_mask , if_id) \ argument
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| D | ddr3_init.c | 186 u32 if_id; in mv_ddr_training_params_set() local
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| D | mv_ddr_plat.c | 736 static int ddr3_tip_a38x_set_divider(u8 dev_num, u32 if_id, in ddr3_tip_a38x_set_divider()
854 int ddr3_tip_ext_read(u32 dev_num, u32 if_id, u32 reg_addr, in ddr3_tip_ext_read()
868 int ddr3_tip_ext_write(u32 dev_num, u32 if_id, u32 reg_addr, in ddr3_tip_ext_write()
1374 u32 if_id, phy_id; in ddr3_tip_configure_phy() local
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| D | ddr3_training_bist.c | 73 int ddr3_tip_bist_read_result(u32 dev_num, u32 if_id, in ddr3_tip_bist_read_result()
168 u32 if_id, enum hws_bist_operation oper_type) in ddr3_tip_bist_operation()
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| /external/u-boot/include/fsl-mc/ |
| D | fsl_dprc.h | 872 uint16_t if_id; member
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| /external/mesa3d/src/mesa/state_tracker/ |
| D | st_glsl_to_tgsi_temprename.cpp | 618 int if_id = 0; in get_temp_registers_required_lifetimes() local
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