| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/ARM/ |
| D | directive-fpu-instrs.s | 5 vldr d21, [r7, #296] label
13 vldr d21, [r7, #296] label
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| D | single-precision-fp.s | 175 vldr d0, [sp] define
|
| D | big-endian-arm-fixup.s | 47 vldr d0, arm_pcrel_10_label+16 define
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| /external/llvm/test/MC/ARM/ |
| D | directive-fpu-instrs.s | 5 vldr d21, [r7, #296] label
13 vldr d21, [r7, #296] label
|
| D | single-precision-fp.s | 175 vldr d0, [sp] define
|
| D | big-endian-arm-fixup.s | 47 vldr d0, arm_pcrel_10_label+16 define
|
| /external/v8/src/compiler/arm/ |
| D | code-generator-arm.cc | 1604 __ vldr(i.OutputFloatRegister(), address, 0); in AssembleArchInstruction() local
1606 __ vldr(i.OutputFloatRegister(), i.InputOffset()); in AssembleArchInstruction() local
1642 __ vldr(i.OutputDoubleRegister(), address, 0); in AssembleArchInstruction() local
1644 __ vldr(i.OutputDoubleRegister(), i.InputOffset()); in AssembleArchInstruction() local
1756 __ vldr(i.OutputDoubleRegister(), MemOperand(fp, offset)); in AssembleArchInstruction() local
1759 __ vldr(i.OutputFloatRegister(), MemOperand(fp, offset)); in AssembleArchInstruction() local
3255 __ vldr(g.ToDoubleRegister(destination), src); in AssembleMove() local
3271 __ vldr(temp, src); in AssembleMove() local
3275 __ vldr(temp, src); in AssembleMove() local
3384 __ vldr(src, dst); in AssembleSwap() local
[all …]
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| /external/v8/src/arm/ |
| D | deoptimizer-arm.cc | 122 __ vldr(d0, sp, src_offset); in Generate() local
205 __ vldr(reg, r1, src_offset); in Generate() local
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| D | assembler-arm.cc | 2484 void Assembler::vldr(const DwVfpRegister dst, in vldr() function in v8::internal::Assembler
2523 void Assembler::vldr(const DwVfpRegister dst, in vldr() function in v8::internal::Assembler
2540 void Assembler::vldr(const SwVfpRegister dst, in vldr() function in v8::internal::Assembler
2577 void Assembler::vldr(const SwVfpRegister dst, in vldr() function in v8::internal::Assembler
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| /external/vixl/src/aarch32/ |
| D | assembler-aarch32.h | 4721 void vldr(DataType dt, DRegister rd, Location* location) { in vldr() function
4724 void vldr(DRegister rd, Location* location) { in vldr() function
4727 void vldr(Condition cond, DRegister rd, Location* location) { in vldr() function
4735 void vldr(DataType dt, DRegister rd, const MemOperand& operand) { in vldr() function
4738 void vldr(DRegister rd, const MemOperand& operand) { in vldr() function
4741 void vldr(Condition cond, DRegister rd, const MemOperand& operand) { in vldr() function
4751 void vldr(DataType dt, SRegister rd, Location* location) { in vldr() function
4754 void vldr(SRegister rd, Location* location) { in vldr() function
4757 void vldr(Condition cond, SRegister rd, Location* location) { in vldr() function
4765 void vldr(DataType dt, SRegister rd, const MemOperand& operand) { in vldr() function
[all …]
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| D | assembler-aarch32.cc | 19571 void Assembler::vldr(Condition cond, in vldr() function in vixl::aarch32::Assembler
19669 void Assembler::vldr(Condition cond, in vldr() function in vixl::aarch32::Assembler
19725 void Assembler::vldr(Condition cond, in vldr() function in vixl::aarch32::Assembler
19823 void Assembler::vldr(Condition cond, in vldr() function in vixl::aarch32::Assembler
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| D | disasm-aarch32.cc | 5008 void Disassembler::vldr(Condition cond, in vldr() function in vixl::aarch32::Disassembler
5020 void Disassembler::vldr(Condition cond, in vldr() function in vixl::aarch32::Disassembler
5030 void Disassembler::vldr(Condition cond, in vldr() function in vixl::aarch32::Disassembler
5042 void Disassembler::vldr(Condition cond, in vldr() function in vixl::aarch32::Disassembler
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| /external/v8/src/builtins/arm/ |
| D | builtins-arm.cc | 2436 __ vldr(double_scratch, input_operand); in Generate_DoubleToI() local
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| /external/vixl/benchmarks/aarch32/ |
| D | asm-disasm-speed-test.cc | 594 __ vldr(d7, &l_05f0); in Generate_4() local
1424 __ vldr(s0, &l_0d24); in Generate_10() local
1526 __ vldr(d7, &l_0d10); in Generate_11() local
|