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/art/compiler/utils/
Dassembler_thumb_test_expected.cc.inc17 " 28: f8dd cffc ldr.w ip, [sp, #4092] ; 0xffc\n",
18 " 2c: f50d 5c80 add.w ip, sp, #4096 ; 0x1000\n",
19 " 30: f8dc c000 ldr.w ip, [ip]\n",
20 " 34: f8d9 c200 ldr.w ip, [r9, #512] ; 0x200\n",
21 " 38: f8dc 0080 ldr.w r0, [ip, #128] ; 0x80\n",
27 " 48: f8cd cffc str.w ip, [sp, #4092] ; 0xffc\n",
30 " 54: f8c5 c004 str.w ip, [r5, #4]\n",
32 " 5c: f04f 0cff mov.w ip, #255 ; 0xff\n",
33 " 60: f8cd c030 str.w ip, [sp, #48] ; 0x30\n",
34 " 64: f06f 4c7f mvn.w ip, #4278190080 ; 0xff000000\n",
[all …]
/art/runtime/arch/arm/
Dmemcmp16_arm.S59 ldrh ip, [r1], #2
60 subs r0, r0, ip
78 ldrh ip, [r1], #2
80 subs r0, r0, ip
101 ldr ip, [r1]
110 eors r0, r0, ip
112 ldreq ip, [r1, #4]!
116 eorseq r0, r0, ip
118 ldreq ip, [r1, #4]!
122 eorseq r0, r0, ip
[all …]
Dquick_entrypoints_arm.S223 .cfi_rel_offset ip, 48
700 ands ip, r2, #LOCK_WORD_GC_STATE_MASK_SHIFTED_TOGGLED @ Test the non-gc bits.
863 push {r0-r3, ip, lr} @ 6 words for saved registers (used in art_quick_aput_obj)
869 .cfi_rel_offset ip, 16
889 POP_REG_NE ip, 16, \rDest
914 READ_BARRIER ip, r2, MIRROR_OBJECT_CLASS_OFFSET
916 cmp r3, ip @ value's type == array's component type - trivial assignability
937 mov r1, ip
1692 mov r0, ip // Pass method index.
1811 ldr ip, [rSELF, #THREAD_TOP_QUICK_FRAME_OFFSET]
[all …]
/art/runtime/interpreter/mterp/arm64/
Dother.S16 GET_INST_OPCODE ip // extract opcode from rINST
17 GOTO_OPCODE ip // jump to next instruction
32 GET_INST_OPCODE ip // extract opcode from wINST
34 GOTO_OPCODE ip // jump to next instruction
42 GET_INST_OPCODE ip // extract opcode from wINST
43 GOTO_OPCODE ip // jump to next instruction
50 GET_INST_OPCODE ip // ip<- opcode from xINST
52 GOTO_OPCODE ip // execute next instruction
64 GET_INST_OPCODE ip // extract opcode from rINST
65 GOTO_OPCODE ip // jump to next instruction
[all …]
Dfloating_point.S17 GET_INST_OPCODE ip // extract opcode from rINST
19 GOTO_OPCODE ip // jump to next instruction
34 GET_INST_OPCODE ip // extract opcode from rINST
36 GOTO_OPCODE ip // jump to next instruction
53 GET_INST_OPCODE ip // extract opcode from rINST
55 GOTO_OPCODE ip // jump to next instruction
68 GET_INST_OPCODE ip // extract opcode from rINST
70 GOTO_OPCODE ip // jump to next instruction
93 GET_INST_OPCODE ip // extract opcode from rINST
95 GOTO_OPCODE ip // jump to next instruction
[all …]
Darray.S26 GET_INST_OPCODE ip // extract opcode from rINST
28 GOTO_OPCODE ip // jump to next instruction
58 GET_INST_OPCODE ip
59 GOTO_OPCODE ip // jump to next instruction
83 GET_INST_OPCODE ip // extract opcode from wINST
85 GOTO_OPCODE ip // jump to next instruction
112 GET_INST_OPCODE ip // extract opcode from rINST
114 GOTO_OPCODE ip // jump to next instruction
137 GET_INST_OPCODE ip // extract opcode from rINST
138 GOTO_OPCODE ip // jump to next instruction
[all …]
Dobject.S14 GET_INST_OPCODE ip // extract opcode from rINST
15 GOTO_OPCODE ip // jump to next instruction
32 GET_INST_OPCODE ip // extract opcode from rINST
33 GOTO_OPCODE ip // jump to next instruction
73 GET_INST_OPCODE ip // extract opcode from rINST
74 GOTO_OPCODE ip // jump to next instruction
118 GET_INST_OPCODE ip // extract opcode from wINST
119 GOTO_OPCODE ip // jump to next instruction
133 GET_INST_OPCODE ip // extract opcode from rINST
134 GOTO_OPCODE ip // jump to next instruction
[all …]
Darithmetic.S30 GET_INST_OPCODE ip // extract opcode from rINST
32 GOTO_OPCODE ip // jump to next instruction
61 GET_INST_OPCODE ip // extract opcode from rINST
63 GOTO_OPCODE ip // jump to next instruction
90 GET_INST_OPCODE ip // extract opcode from rINST
92 GOTO_OPCODE ip // jump to next instruction
125 GET_INST_OPCODE ip // extract opcode from rINST
127 GOTO_OPCODE ip // jump to next instruction
156 GET_INST_OPCODE ip // extract opcode from rINST
158 GOTO_OPCODE ip // jump to next instruction
[all …]
Dinvoke.S18 GET_INST_OPCODE ip
19 GOTO_OPCODE ip
39 GET_INST_OPCODE ip
40 GOTO_OPCODE ip
Dmain.S109 #define ip x16 macro
439 GET_INST_OPCODE ip // extract opcode from wINST
440 GOTO_OPCODE ip // jump to next instruction
574 GET_INST_OPCODE ip
575 GOTO_OPCODE ip
613 GET_INST_OPCODE ip // extract opcode from wINST
614 GOTO_OPCODE ip // jump to next instruction
622 GET_INST_OPCODE ip // extract opcode from wINST
623 GOTO_OPCODE ip // jump to next instruction
642 GET_INST_OPCODE ip // extract opcode from wINST
[all …]
Dcontrol_flow.S19 GET_INST_OPCODE ip // extract opcode from wINST
20 GOTO_OPCODE ip // jump to next instruction
40 GET_INST_OPCODE ip // extract opcode from wINST
41 GOTO_OPCODE ip // jump to next instruction
/art/runtime/interpreter/mterp/arm/
Dother.S17 GET_INST_OPCODE ip @ extract opcode from rINST
18 GOTO_OPCODE ip @ jump to next instruction
33 GET_INST_OPCODE ip @ extract opcode from rINST
35 GOTO_OPCODE ip @ jump to next instruction
43 GET_INST_OPCODE ip @ extract opcode from rINST
44 GOTO_OPCODE ip @ jump to next instruction
51 GET_INST_OPCODE ip @ ip<- opcode from rINST
53 GOTO_OPCODE ip @ execute next instruction
65 GET_INST_OPCODE ip @ extract opcode from rINST
66 GOTO_OPCODE ip @ jump to next instruction
[all …]
Darithmetic.S32 GET_INST_OPCODE ip @ extract opcode from rINST
34 GOTO_OPCODE ip @ jump to next instruction
65 GET_INST_OPCODE ip @ extract opcode from rINST
67 GOTO_OPCODE ip @ jump to next instruction
95 GET_INST_OPCODE ip @ extract opcode from rINST
97 GOTO_OPCODE ip @ jump to next instruction
131 GET_INST_OPCODE ip @ extract opcode from rINST
133 GOTO_OPCODE ip @ jump to next instruction
163 orrs ip, r2, r3 @ second arg (r2-r3) is zero?
166 CLEAR_SHADOW_PAIR rINST, lr, ip @ Zero out the shadow regs
[all …]
Dobject.S15 GET_INST_OPCODE ip @ extract opcode from rINST
16 GOTO_OPCODE ip @ jump to next instruction
34 GET_INST_OPCODE ip @ extract opcode from rINST
35 GOTO_OPCODE ip @ jump to next instruction
123 GET_INST_OPCODE ip @ extract opcode from rINST
124 GOTO_OPCODE ip @ jump to next instruction
158 ldrd r0, [r3, ip] @ r0<- obj.field (64 bits, aligned)
161 CLEAR_SHADOW_PAIR r2, ip, lr @ Zero out the shadow regs
162 GET_INST_OPCODE ip @ extract opcode from rINST
164 GOTO_OPCODE ip @ jump to next instruction
[all …]
Darray.S27 GET_INST_OPCODE ip @ extract opcode from rINST
29 GOTO_OPCODE ip @ jump to next instruction
60 GET_INST_OPCODE ip
61 GOTO_OPCODE ip @ jump to next instruction
86 CLEAR_SHADOW_PAIR r9, lr, ip @ Zero out the shadow regs
89 GET_INST_OPCODE ip @ extract opcode from rINST
91 GOTO_OPCODE ip @ jump to next instruction
119 GET_INST_OPCODE ip @ extract opcode from rINST
121 GOTO_OPCODE ip @ jump to next instruction
145 GET_INST_OPCODE ip @ extract opcode from rINST
[all …]
Dinvoke.S20 GET_INST_OPCODE ip
21 GOTO_OPCODE ip
43 GET_INST_OPCODE ip
44 GOTO_OPCODE ip
Dmain.S263 add ip, rFP, \vreg, lsl #2
264 strd \regLo, \regHi, [ip]
267 add ip, rREFS, \vreg, lsl #2
268 strd \regLo, \regHi, [ip]
426 GET_INST_OPCODE ip @ extract opcode from rINST
427 GOTO_OPCODE ip @ jump to next instruction
565 GET_INST_OPCODE ip
566 GOTO_OPCODE ip
Dcontrol_flow.S19 GET_INST_OPCODE ip @ extract opcode from rINST
20 GOTO_OPCODE ip @ jump to next instruction
38 GET_INST_OPCODE ip @ extract opcode from rINST
39 GOTO_OPCODE ip @ jump to next instruction
Dfloating_point.S21 GET_INST_OPCODE ip @ extract opcode from rINST
23 GOTO_OPCODE ip @ jump to next instruction
42 GET_INST_OPCODE ip @ extract opcode from rINST
/art/disassembler/
Ddisassembler_arm.cc217 const uint16_t* const ip = reinterpret_cast<const uint16_t*>(instr_ptr); in Dump() local
220 next = reinterpret_cast<uintptr_t>(disasm_->DecodeT32At(ip, end_address)); in Dump()
222 const uint32_t* const ip = reinterpret_cast<const uint32_t*>(instr_ptr); in Dump() local
223 next = reinterpret_cast<uintptr_t>(disasm_->DecodeA32At(ip)); in Dump()
/art/compiler/optimizing/
Dcode_generator_arm_vixl.cc8354 temps.Exclude(ip); in GenerateGcRootFieldLoad()
8455 temps.Exclude(ip); in GenerateFieldLoadWithBakerReadBarrier()
8491 MaybeGenerateMarkingRegisterCheck(/* code= */ 20, /* temp_loc= */ LocationFrom(ip)); in GenerateFieldLoadWithBakerReadBarrier()
8553 temps.Exclude(ip); in GenerateArrayLoadWithBakerReadBarrier()
8579 MaybeGenerateMarkingRegisterCheck(/* code= */ 21, /* temp_loc= */ LocationFrom(ip)); in GenerateArrayLoadWithBakerReadBarrier()
9315 __ Ldr(ip, lock_word); in EmitGrayCheckAndFastPath()
9319 __ Tst(ip, Operand(LockWord::kReadBarrierStateMaskShifted)); in EmitGrayCheckAndFastPath()
9329 __ Add(base_reg, base_reg, Operand(ip, LSR, 32)); in EmitGrayCheckAndFastPath()
9340 DCHECK_EQ(ip.GetCode(), 12u); in LoadReadBarrierMarkIntrospectionEntrypoint()
9342 Thread::ReadBarrierMarkEntryPointsOffset<kArmPointerSize>(ip.GetCode()); in LoadReadBarrierMarkIntrospectionEntrypoint()
[all …]
Dintrinsics_arm_vixl.cc218 DCHECK(!src_curr_addr.Is(ip)); in EmitNativeCode()
219 DCHECK(!dst_curr_addr.Is(ip)); in EmitNativeCode()
220 DCHECK(!src_stop_addr.Is(ip)); in EmitNativeCode()
221 DCHECK(!tmp.Is(ip)); in EmitNativeCode()
Dcode_generator_arm_vixl.h786 DCHECK(reg < vixl::aarch32::ip.GetCode() && reg != mr.GetCode()) << reg; in CheckValidReg()
/art/compiler/utils/arm/
Dassembler_arm_vixl.cc307 CHECK(!base.Is(ip)); in LoadFromOffset()
/art/tools/jvmti-agents/ti-fast/
Dtifast.cc362 jint* ip,