Searched refs:mbase (Results 1 – 5 of 5) sorted by relevance
| /art/compiler/utils/x86_64/ |
| D | jni_macro_assembler_x86_64.cc | 295 ManagedRegister mbase, in LoadRef() argument
298 X86_64ManagedRegister base = mbase.AsX86_64(); in LoadRef()
309 ManagedRegister mbase, in LoadRawPtr() argument
311 X86_64ManagedRegister base = mbase.AsX86_64(); in LoadRawPtr()
547 void X86_64JNIMacroAssembler::Call(ManagedRegister mbase, Offset offset, ManagedRegister) { in Call() argument
548 X86_64ManagedRegister base = mbase.AsX86_64(); in Call()
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| /art/compiler/utils/arm/ |
| D | jni_macro_assembler_arm_vixl.cc | 287 ManagedRegister mbase, in LoadRef() argument
291 vixl::aarch32::Register base = AsVIXLRegister(mbase.AsArm()); in LoadRef()
573 void ArmVIXLJNIMacroAssembler::Call(ManagedRegister mbase, in Call() argument
576 vixl::aarch32::Register base = AsVIXLRegister(mbase.AsArm()); in Call()
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| /art/compiler/utils/x86/ |
| D | jni_macro_assembler_x86.cc | 490 void X86JNIMacroAssembler::Call(ManagedRegister mbase, Offset offset, ManagedRegister) { in Call() argument
491 X86ManagedRegister base = mbase.AsX86(); in Call()
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| /art/compiler/utils/mips64/ |
| D | assembler_mips64.cc | 4030 void Mips64Assembler::Call(ManagedRegister mbase, Offset offset, ManagedRegister mscratch) { in Call() argument
4031 Mips64ManagedRegister base = mbase.AsMips64(); in Call()
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| /art/compiler/utils/mips/ |
| D | assembler_mips.cc | 5194 void MipsAssembler::Call(ManagedRegister mbase, Offset offset, ManagedRegister mscratch) { in Call() argument
5195 MipsManagedRegister base = mbase.AsMips(); in Call()
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