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Searched refs:MPIDR_AFF0_SHIFT (Results 1 – 13 of 13) sorted by relevance

/device/linaro/bootloader/arm-trusted-firmware/plat/arm/common/
Darm_topology.c29 pe_id = (mpidr >> MPIDR_AFF0_SHIFT) & MPIDR_AFFLVL_MASK; in arm_check_mpidr()
33 cpu_id = (mpidr >> MPIDR_AFF0_SHIFT) & MPIDR_AFFLVL_MASK; in arm_check_mpidr()
/device/linaro/bootloader/arm-trusted-firmware/plat/nvidia/tegra/common/
Dtegra_topology.c33 cpu_id = (mpidr >> MPIDR_AFF0_SHIFT) & MPIDR_AFFLVL_MASK; in plat_core_pos_by_mpidr()
/device/linaro/bootloader/arm-trusted-firmware/plat/hisilicon/hikey/
Dhikey_topology.c51 cpu_id = (mpidr >> MPIDR_AFF0_SHIFT) & MPIDR_AFFLVL_MASK; in plat_core_pos_by_mpidr()
/device/linaro/bootloader/arm-trusted-firmware/plat/qemu/
Dtopology.c45 cpu_id = (mpidr >> MPIDR_AFF0_SHIFT) & MPIDR_AFFLVL_MASK; in plat_core_pos_by_mpidr()
/device/linaro/bootloader/arm-trusted-firmware/plat/hisilicon/hikey960/
Dhikey960_topology.c51 cpu_id = (mpidr >> MPIDR_AFF0_SHIFT) & MPIDR_AFFLVL_MASK; in plat_core_pos_by_mpidr()
/device/linaro/bootloader/arm-trusted-firmware/plat/socionext/uniphier/
Duniphier_topology.c35 cpu_id = (mpidr >> MPIDR_AFF0_SHIFT) & MPIDR_AFFLVL_MASK; in plat_core_pos_by_mpidr()
/device/linaro/bootloader/arm-trusted-firmware/drivers/arm/gic/
Dgic_v3.c20 cpu_aff = ((mpidr >> MPIDR_AFF0_SHIFT) & MPIDR_AFFLVL_MASK) << in gicv3_get_rdist()
/device/linaro/bootloader/arm-trusted-firmware/plat/mediatek/mt8173/
Dplat_topology.c71 cpu_id = (mpidr >> MPIDR_AFF0_SHIFT) & MPIDR_AFFLVL_MASK; in plat_core_pos_by_mpidr()
/device/linaro/bootloader/arm-trusted-firmware/plat/arm/board/fvp/aarch32/
Dfvp_helpers.S129 ubfx r0, r3, #MPIDR_AFF0_SHIFT, #MPIDR_AFFINITY_BITS
/device/linaro/bootloader/arm-trusted-firmware/plat/nvidia/tegra/soc/t186/
Dplat_setup.c252 cpu_id = (mpidr >> MPIDR_AFF0_SHIFT) & MPIDR_AFFLVL_MASK; in plat_core_pos_by_mpidr()
/device/linaro/bootloader/arm-trusted-firmware/include/lib/aarch32/
Darch.h33 #define MPIDR_AFF0_SHIFT 0 macro
42 (((mpidr) >> MPIDR_AFF0_SHIFT) & MPIDR_AFFLVL_MASK)
/device/linaro/bootloader/arm-trusted-firmware/plat/arm/board/fvp/aarch64/
Dfvp_helpers.S203 ubfx x0, x3, #MPIDR_AFF0_SHIFT, #MPIDR_AFFINITY_BITS
/device/linaro/bootloader/arm-trusted-firmware/include/lib/aarch64/
Darch.h34 #define MPIDR_AFF0_SHIFT U(0) macro
45 ((mpidr >> MPIDR_AFF0_SHIFT) & MPIDR_AFFLVL_MASK)