Searched refs:MPIDR_AFFLVL_MASK (Results 1 – 17 of 17) sorted by relevance
24 valid_mask = ~(MPIDR_AFFLVL_MASK | in arm_check_mpidr()25 (MPIDR_AFFLVL_MASK << MPIDR_AFF1_SHIFT) | in arm_check_mpidr()26 (MPIDR_AFFLVL_MASK << MPIDR_AFF2_SHIFT)); in arm_check_mpidr()27 cluster_id = (mpidr >> MPIDR_AFF2_SHIFT) & MPIDR_AFFLVL_MASK; in arm_check_mpidr()28 cpu_id = (mpidr >> MPIDR_AFF1_SHIFT) & MPIDR_AFFLVL_MASK; in arm_check_mpidr()29 pe_id = (mpidr >> MPIDR_AFF0_SHIFT) & MPIDR_AFFLVL_MASK; in arm_check_mpidr()32 cluster_id = (mpidr >> MPIDR_AFF1_SHIFT) & MPIDR_AFFLVL_MASK; in arm_check_mpidr()33 cpu_id = (mpidr >> MPIDR_AFF0_SHIFT) & MPIDR_AFFLVL_MASK; in arm_check_mpidr()
20 cpu_aff = ((mpidr >> MPIDR_AFF0_SHIFT) & MPIDR_AFFLVL_MASK) << in gicv3_get_rdist()22 cpu_aff |= ((mpidr >> MPIDR_AFF1_SHIFT) & MPIDR_AFFLVL_MASK) << in gicv3_get_rdist()24 cpu_aff |= ((mpidr >> MPIDR_AFF2_SHIFT) & MPIDR_AFFLVL_MASK) << in gicv3_get_rdist()26 cpu_aff |= ((mpidr >> MPIDR_AFF3_SHIFT) & MPIDR_AFFLVL_MASK) << in gicv3_get_rdist()
32 cluster_id = (mpidr >> MPIDR_AFF1_SHIFT) & MPIDR_AFFLVL_MASK; in plat_core_pos_by_mpidr()33 cpu_id = (mpidr >> MPIDR_AFF0_SHIFT) & MPIDR_AFFLVL_MASK; in plat_core_pos_by_mpidr()
50 cluster_id = (mpidr >> MPIDR_AFF1_SHIFT) & MPIDR_AFFLVL_MASK; in plat_core_pos_by_mpidr()51 cpu_id = (mpidr >> MPIDR_AFF0_SHIFT) & MPIDR_AFFLVL_MASK; in plat_core_pos_by_mpidr()
44 cluster_id = (mpidr >> MPIDR_AFF1_SHIFT) & MPIDR_AFFLVL_MASK; in plat_core_pos_by_mpidr()45 cpu_id = (mpidr >> MPIDR_AFF0_SHIFT) & MPIDR_AFFLVL_MASK; in plat_core_pos_by_mpidr()
31 cluster_id = (mpidr >> MPIDR_AFF1_SHIFT) & MPIDR_AFFLVL_MASK; in plat_core_pos_by_mpidr()35 cpu_id = (mpidr >> MPIDR_AFF0_SHIFT) & MPIDR_AFFLVL_MASK; in plat_core_pos_by_mpidr()
191 cpu = (mpidr >> MPIDR_AFF1_SHIFT) & MPIDR_AFFLVL_MASK; in scpi_get_css_power_state()192 cluster = (mpidr >> MPIDR_AFF2_SHIFT) & MPIDR_AFFLVL_MASK; in scpi_get_css_power_state()194 cpu = mpidr & MPIDR_AFFLVL_MASK; in scpi_get_css_power_state()195 cluster = (mpidr >> MPIDR_AFF1_SHIFT) & MPIDR_AFFLVL_MASK; in scpi_get_css_power_state()
70 cluster_id = (mpidr >> MPIDR_AFF1_SHIFT) & MPIDR_AFFLVL_MASK; in plat_core_pos_by_mpidr()71 cpu_id = (mpidr >> MPIDR_AFF0_SHIFT) & MPIDR_AFFLVL_MASK; in plat_core_pos_by_mpidr()
28 #define MPIDR_CPU_MASK MPIDR_AFFLVL_MASK29 #define MPIDR_CLUSTER_MASK (MPIDR_AFFLVL_MASK << MPIDR_AFFINITY_BITS)31 #define MPIDR_AFFLVL_MASK 0xff macro42 (((mpidr) >> MPIDR_AFF0_SHIFT) & MPIDR_AFFLVL_MASK)44 (((mpidr) >> MPIDR_AFF1_SHIFT) & MPIDR_AFFLVL_MASK)46 (((mpidr) >> MPIDR_AFF2_SHIFT) & MPIDR_AFFLVL_MASK)
102 element = (mpidr >> MPIDR_AFF1_SHIFT) & MPIDR_AFFLVL_MASK; in css_scp_get_power_state()104 element = mpidr & MPIDR_AFFLVL_MASK; in css_scp_get_power_state()
30 #define MPIDR_CPU_MASK MPIDR_AFFLVL_MASK31 #define MPIDR_CLUSTER_MASK (MPIDR_AFFLVL_MASK << MPIDR_AFFINITY_BITS)33 #define MPIDR_AFFLVL_MASK U(0xff) macro45 ((mpidr >> MPIDR_AFF0_SHIFT) & MPIDR_AFFLVL_MASK)47 ((mpidr >> MPIDR_AFF1_SHIFT) & MPIDR_AFFLVL_MASK)49 ((mpidr >> MPIDR_AFF2_SHIFT) & MPIDR_AFFLVL_MASK)51 ((mpidr >> MPIDR_AFF3_SHIFT) & MPIDR_AFFLVL_MASK)
37 mpidr &= ~((unsigned long)MPIDR_AFFLVL_MASK << aff_shift); in mpidr_set_aff_inst()187 ((unsigned long)MPIDR_AFFLVL_MASK << shift)) >> shift); in plat_core_pos_by_mpidr()
24 cpu_id = mpidr & MPIDR_AFFLVL_MASK; in plat_core_pos_by_mpidr()
251 cluster_id = (mpidr >> MPIDR_AFF1_SHIFT) & MPIDR_AFFLVL_MASK; in plat_core_pos_by_mpidr()252 cpu_id = (mpidr >> MPIDR_AFF0_SHIFT) & MPIDR_AFFLVL_MASK; in plat_core_pos_by_mpidr()
57 (mpidr >> MPIDR_AFF1_SHIFT) & MPIDR_AFFLVL_MASK; in get_slave_iface_base()
42 (((((typer_val) >> 56) & MPIDR_AFFLVL_MASK) << MPIDR_AFF3_SHIFT) | \